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This commit is contained in:
Wilson Snyder 2024-02-04 09:35:19 -05:00
parent 6ca60429ce
commit 7425037db6
2 changed files with 9 additions and 7 deletions
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14
docs/guide/faq.rst
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@ -226,12 +226,14 @@ How do I generate FST waveforms (traces) in C++ or SystemC?
FST is a trace file format developed by GTKWave. Verilator provides basic
FST support. To dump traces in FST format, add the :vlopt:`--trace-fst`
option to Verilator and either A. use :code:`$dumpfile & $dumpvars` in
Verilog as described in the VCD example above,
option to Verilator and either:
Use :code:`$dumpfile & $dumpvars` in Verilog as described in the VCD
example above,
Or, in C++ change the include described in the VCD example above:
.. code-block:: C++
.. code-block:: C++
#include "verilated_fst_c.h"
VerilatedFstC* tfp = new VerilatedFstC;
@ -239,14 +241,14 @@ Or, in C++ change the include described in the VCD example above:
Or, in SystemC, change the include described in the VCD example above:
.. code-block:: C++
.. code-block:: C++
#include "verilated_fst_sc.h"
VerilatedFstC* tfp = new VerilatedFstSc;
Currently, supporting FST and VCD in a single simulation is impossible, but
such requirement should be rare. You can however ifdef around the trace
Currently, supporting FST and VCD in a single simulation is not supported,
but such usage should be unlikely. You can however ifdef around the trace
format in your C++ main loop, and select VCD or FST at compile time.

2
test_regress/t/t_vl_assign_sbw.pl
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@ -2,7 +2,7 @@
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Antmicro. This program is free software; you
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.