diff --git a/test_regress/t/t_readmemstr.mem b/test_regress/t/t_readmemstr.mem new file mode 100644 index 000000000..7d0d318d1 --- /dev/null +++ b/test_regress/t/t_readmemstr.mem @@ -0,0 +1 @@ +0101 diff --git a/test_regress/t/t_readmemstr.py b/test_regress/t/t_readmemstr.py new file mode 100755 index 000000000..a4e75e7ad --- /dev/null +++ b/test_regress/t/t_readmemstr.py @@ -0,0 +1,18 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('simulator') + +test.compile(verilator_flags2=["--exe --main --timing"]) + +test.execute() + +test.passes() diff --git a/test_regress/t/t_readmemstr.v b/test_regress/t/t_readmemstr.v new file mode 100644 index 000000000..3e05d9edd --- /dev/null +++ b/test_regress/t/t_readmemstr.v @@ -0,0 +1,36 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2024 by Dan Petrisko +// SPDX-License-Identifier: CC0-1.0 + +module test_rom #(parameter filename_p); + + logic [3:0] mem [0:0]; + initial begin + $readmemb(filename_p, mem); + if (mem[0][0] != 1'b1) $stop; + if (mem[0][1] != 1'b0) $stop; + if (mem[0][2] != 1'b1) $stop; + if (mem[0][3] != 1'b0) $stop; + end + +endmodule + +module Test; + + // %Warning: $readmem file not found + localparam string str_trace_file_lp = "t/t_readmemstr.mem"; + test_rom #(.filename_p(str_trace_file_lp)) str_rom(); + + // Successfully finds file + localparam def_trace_file_lp = "t/t_readmemstr.mem"; + test_rom #(.filename_p(def_trace_file_lp)) def_rom(); + + initial begin + #1000; + $finish; + end + +endmodule +