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Fix dotted references to type parameter sizes, bug1458.

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Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
This commit is contained in:
Todd Strader 2019-06-11 19:00:24 -04:00 committed by Wilson Snyder
parent 6ffbb7cabf
commit 6f2f668449
3 changed files with 49 additions and 16 deletions
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@ -24,13 +24,11 @@ The contributors that suggested a given feature are shown in []. Thanks!
**** Fix parameter function string returns, bug1441. [Denis Rystsov]
**** Fix real parameter assignment, bug1427. [Todd Strader]
**** Fix invalid XML output due to special chars, bug1444. [Kanad Kanhere]
**** Fix performance when mulithreaded on 1 CPU, bug1455. [Stefan Wallentowitz]
**** Fix sameHash error on type parameters, bug1456. [Todd Strader]
**** Fix type and real parameter issues, bug1427, bug1456, bug1458. [Todd Strader]
* Verilator 4.014 2019-05-08

1
src/V3Param.cpp
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@ -633,6 +633,7 @@ void ParamVisitor::visitCell(AstCell* nodep) {
// This prevents making additional modules, and makes coverage more
// obvious as it won't show up under a unique module page name.
} else {
V3Const::constifyParamsEdit(exprp);
longname += "_" + paramSmallName(srcModp, modvarp) + paramValueNumber(exprp);
any_overrides = true;
}

60
test_regress/t/t_type_param.v
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@ -4,7 +4,7 @@
// without warranty, 2019 by Todd Strader.
module foo
#( parameter type bar = logic)
#(parameter type bar = logic)
(output int bar_size);
localparam baz = $bits(bar);
@ -12,6 +12,14 @@ module foo
assign bar_size = baz;
endmodule
module foo_wrapper
#(parameter bar_bits = 9)
(output int bar_size);
foo #(.bar (logic[bar_bits-1:0])) foo_inst (.bar_size (bar_size));
endmodule
module t();
logic [7:0] qux1;
int bar_size1;
@ -31,12 +39,33 @@ module t();
foo #(.bar (logic [ $bits(qux3) - 1 : 0]))
foo_inst3 (.bar_size (bar_size3));
localparam bar_bits = 13;
int bar_size_wrapper;
foo_wrapper #(.bar_bits (bar_bits))
foo_wrapper_inst (.bar_size (bar_size_wrapper));
initial begin
// if ($bits(qux) != $bits(foo_inst.baz)) begin
// $display("%m: bits of qux != bits of foo_inst.baz (%0d, %0d)",
// $bits(qux), $bits(foo_inst.baz));
// $stop();
// end
if ($bits(qux1) != foo_inst1.baz) begin
$display("%m: bits of qux1 != bits of foo_inst1.baz (%0d, %0d)",
$bits(qux1), foo_inst1.baz);
$stop();
end
if ($bits(qux2) != foo_inst2.baz) begin
$display("%m: bits of qux2 != bits of foo_inst2.baz (%0d, %0d)",
$bits(qux2), foo_inst2.baz);
$stop();
end
if ($bits(qux3) != foo_inst3.baz) begin
$display("%m: bits of qux3 != bits of foo_inst3.baz (%0d, %0d)",
$bits(qux3), foo_inst3.baz);
$stop();
end
if (bar_bits != foo_wrapper_inst.foo_inst.baz) begin
$display("%m: bar_bits != bits of foo_wrapper_inst.foo_inst.baz (%0d, %0d)",
bar_bits, foo_wrapper_inst.foo_inst.baz);
$stop();
end
if (bar_size1 != $bits(qux1)) begin
$display("%m: bar_size1 != bits of qux1 (%0d, %0d)",
bar_size1, $bits(qux1));
@ -52,18 +81,23 @@ module t();
bar_size3, $bits(qux3));
$stop();
end
if (bar_size_wrapper != bar_bits) begin
$display("%m: bar_size_wrapper != bar_bits (%0d, %0d)",
bar_size_wrapper, bar_bits);
$stop();
end
end
genvar m;
generate
for (m = 1; m <= 8; m+=1) begin : gen_m
// initial begin
// if (m != $bits(foo_inst.baz)) begin
// $display("%m: m != bits of foo_inst.baz (%0d, %0d)",
// m, $bits(foo_inst.baz));
// $stop();
// end
// end
initial begin
if (m != foo_inst.baz) begin
$display("%m: m != bits of foo_inst.baz (%0d, %0d)",
m, foo_inst.baz);
$stop();
end
end
foo #(.bar (logic[m-1:0])) foo_inst (.bar_size ());
end