diff --git a/Changes b/Changes
index db5dca1c6..c71683f74 100644
--- a/Changes
+++ b/Changes
@@ -23,6 +23,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 ****  Fix bare generates in interfaces, bug789. [Bob Newgard]
 
+****  Fix underscores in real literals, bug863. [Jonathon Donaldson]
+
 
 * Verilator 3.866 2014-11-15
 
diff --git a/src/verilog.l b/src/verilog.l
index c10bbe0f2..d73342ccc 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -972,15 +972,14 @@ int V3ParseImp::stateVerilogRecent() { return STATE_VERILOG_RECENT; }
 double V3ParseImp::parseDouble(const char* textp, size_t length) {
     char* strgp = new char[length+1];
     char* dp=strgp;
-    for (const char* sp=textp; sp<(textp+length);) {
-	if (*sp != '_') *dp++ = *sp++;
-	else sp++;
+    for (const char* sp=textp; sp<(textp+length); ++sp) {
+	if (*sp != '_') *dp++ = *sp;
     }
     *dp++ = '\0';
     char* endp = strgp;
     double d = strtod(strgp, &endp);
     size_t parsed_len = endp-strgp;
-    if (parsed_len != length) { yyerrorf("Syntax error parsing real: %s",strgp); }
+    if (parsed_len != strlen(strgp)) { yyerrorf("Syntax error parsing real: %s",strgp); }
     delete strgp;
     return d;
 }
diff --git a/test_regress/t/t_math_real.v b/test_regress/t/t_math_real.v
index dcb19a0ef..a72054b69 100644
--- a/test_regress/t/t_math_real.v
+++ b/test_regress/t/t_math_real.v
@@ -24,6 +24,7 @@ module t (/*AUTOARG*/
    sub_cast_bug374 sub (.cyc5(cyc[4:0]), .*);
 
    initial begin
+      if (1_00_0.0_1 != 1000.01) $stop;
       // rtoi truncates
       if ($rtoi(36.7) != 36) $stop;
       if ($rtoi(36.5) != 36) $stop;