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Tests: Fix last commit on width (#4781).

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This commit is contained in:
Wilson Snyder 2023-12-31 13:28:49 -05:00
parent 4655ee014b
commit 5a83209b9b
2 changed files with 6 additions and 6 deletions
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4
test_regress/t/t_math_wide_bad.out
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@ -2,10 +2,10 @@
23 | assign r = real'(a); 23 | assign r = real'(a);
| ^~~~ | ^~~~
... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error-UNSUPPORTED: t/t_math_wide_bad.v:22:18: Unsupported: operator POWSS operator of 576 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h %Error-UNSUPPORTED: t/t_math_wide_bad.v:22:18: Unsupported: operator POWSS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
22 | assign z2 = a ** 3; 22 | assign z2 = a ** 3;
| ^~ | ^~
%Error-UNSUPPORTED: t/t_math_wide_bad.v:21:17: Unsupported: operator MULS operator of 576 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h %Error-UNSUPPORTED: t/t_math_wide_bad.v:21:17: Unsupported: operator MULS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
21 | assign z = a * b; 21 | assign z = a * b;
| ^ | ^
%Error: Exiting due to %Error: Exiting due to

8
test_regress/t/t_math_wide_bad.v
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@ -11,11 +11,11 @@ module t (/*AUTOARG*/
a, b a, b
); );
input signed [17*32 : 0] a; input signed [170*32 : 0] a;
input signed [17*32 : 0] b; input signed [170*32 : 0] b;
output signed [17*32 : 0] z; output signed [170*32 : 0] z;
output signed [17*32 : 0] z2; output signed [170*32 : 0] z2;
output real r; output real r;
assign z = a * b; assign z = a * b;