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Fix SC_LIBS missing from generated makefiles. [Ding Xiaoliang]

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git-svn-id: file://localhost/svn/verilator/trunk/verilator@949 77ca24e4-aefa-0310-84f0-b9a241c72d87
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Wilson Snyder 2007-07-31 14:47:21 +00:00
parent 79d305f3e8
commit 551393d443
2 changed files with 3 additions and 1 deletions
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@ -7,6 +7,8 @@ indicates the contributor was also the author of the fix; Thanks!
**** Support SystemVerilog ==? and !=? operators.
**** Fix SC_LIBS missing from generated makefiles. [Ding Xiaoliang]
* Verilator 3.652 6/21/2007
**** Report as many warning types as possible before exiting.

2
src/V3EmitMk.cpp
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@ -138,7 +138,7 @@ public:
of.puts("\n# Link rules...\n");
of.puts(v3Global.opt.prefix()+": $(VK_USER_OBJS) $(SP_SRCS) $(VM_PREFIX)__ALL.a\n");
of.puts("\t$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) -o $@ $(LIBS) 2>&1 | c++filt\n");
of.puts("\t$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) -o $@ $(LIBS) $(SC_LIBS) 2>&1 | c++filt\n");
of.puts("\n");
}