Tests: Fix some verilog.y parser coverage holes

This commit is contained in:
Wilson Snyder 2024-07-26 07:29:15 -04:00
parent 1600cc01a4
commit 50a5a1ff5b
5 changed files with 13 additions and 5 deletions

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@ -570,7 +570,7 @@ string V3Number::ascii(bool prefixed, bool cleanVerilog) const VL_MT_STABLE {
} }
if (isNull()) { if (isNull()) {
if (VL_UNCOVERABLE(!isEqZero())) { if (VL_UNCOVERABLE(!isEqZero())) {
out << "-%E-null-not-zero"; out << "-%E-null-not-zero"; // LCOV_EXCL_LINE
} else { } else {
out << " [null]"; out << " [null]";
} }

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@ -35,9 +35,12 @@ module t (/*AUTOARG*/
assert (0) else $info("Info message"); assert (0) else $info("Info message");
assume (0) else $info("Info message from failing assumption"); assume (0) else $info("Info message from failing assumption");
assert (0) else $info("Info message, cyc=%d", cyc); assert (0) else $info("Info message, cyc=%d", cyc);
InWarningBlock: assert (0) else $warning("Warning.... 1.0=%f 2.0=%f", 1.0, 2.0); InWarningBlock: assert (0) else $warning;
InErrorBlock: assert (0) else $error("Error...."); InWarningMBlock: assert (0) else $warning("Warning.... 1.0=%f 2.0=%f", 1.0, 2.0);
InErrorBlock: assert (0) else $error;
InErrorMBlock: assert (0) else $error("Error....");
assert (0) else $fatal(1, "Fatal...."); assert (0) else $fatal(1, "Fatal....");
assert (0) else $fatal;
`endif `endif
end end
if (cyc==10) begin if (cyc==10) begin

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@ -32,4 +32,8 @@
: ... note: In instance 't' : ... note: In instance 't'
17 | $fatal(0, "User elaboration-time fatal"); 17 | $fatal(0, "User elaboration-time fatal");
| ^~~~~~ | ^~~~~~
%Warning-USERFATAL: t/t_assert_comp_bad.v:18:7: Elaboration system task message (IEEE 1800-2023 20.11)
: ... note: In instance 't'
18 | $fatal;
| ^~~~~~
%Error: Exiting due to %Error: Exiting due to

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@ -61,7 +61,7 @@ if (!-r "$root/.git") {
extract( extract(
in => $Self->{golden_filename}, in => $Self->{golden_filename},
out => "../docs/gen/ex_USERFATAL_msg.rst", out => "../docs/gen/ex_USERFATAL_msg.rst",
regexp => qr/USERFATAL/); regexp => qr/USERFATAL:.* User/);
} }
ok(1); ok(1);

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@ -15,6 +15,7 @@ module t (/*AUTOARG*/);
$error; $error;
$error("User elaboration-time error"); $error("User elaboration-time error");
$fatal(0, "User elaboration-time fatal"); $fatal(0, "User elaboration-time fatal");
$fatal;
end end
endmodule endmodule