mirror of
https://github.com/verilator/verilator.git
synced 2025-01-22 14:24:18 +00:00
Internals: Cleanup V3Unknown. No functional change intended.
This commit is contained in:
parent
cef7610b14
commit
5091298fae
@ -137,6 +137,7 @@ private:
|
||||
virtual void visit(AstNodeModule* nodep) override {
|
||||
UINFO(4, " MOD " << nodep << endl);
|
||||
VL_RESTORER(m_modp);
|
||||
VL_RESTORER(m_constXCvt);
|
||||
{
|
||||
m_modp = nodep;
|
||||
m_constXCvt = true;
|
||||
@ -144,25 +145,34 @@ private:
|
||||
}
|
||||
}
|
||||
virtual void visit(AstAssignDly* nodep) override {
|
||||
m_assigndlyp = nodep;
|
||||
VL_DO_DANGLING(iterateChildren(nodep), nodep); // May delete nodep.
|
||||
m_assigndlyp = nullptr;
|
||||
VL_RESTORER(m_assigndlyp);
|
||||
{
|
||||
m_assigndlyp = nodep;
|
||||
VL_DO_DANGLING(iterateChildren(nodep), nodep); // May delete nodep.
|
||||
}
|
||||
}
|
||||
virtual void visit(AstAssignW* nodep) override {
|
||||
m_assignwp = nodep;
|
||||
VL_DO_DANGLING(iterateChildren(nodep), nodep); // May delete nodep.
|
||||
m_assignwp = nullptr;
|
||||
VL_RESTORER(m_assignwp);
|
||||
{
|
||||
m_assignwp = nodep;
|
||||
VL_DO_DANGLING(iterateChildren(nodep), nodep); // May delete nodep.
|
||||
}
|
||||
}
|
||||
virtual void visit(AstCaseItem* nodep) override {
|
||||
m_constXCvt = false; // Avoid losing the X's in casex
|
||||
iterateAndNextNull(nodep->condsp());
|
||||
m_constXCvt = true;
|
||||
iterateAndNextNull(nodep->bodysp());
|
||||
VL_RESTORER(m_constXCvt);
|
||||
{
|
||||
m_constXCvt = false; // Avoid losing the X's in casex
|
||||
iterateAndNextNull(nodep->condsp());
|
||||
m_constXCvt = true;
|
||||
iterateAndNextNull(nodep->bodysp());
|
||||
}
|
||||
}
|
||||
virtual void visit(AstNodeDType* nodep) override {
|
||||
m_constXCvt = false; // Avoid losing the X's in casex
|
||||
iterateChildren(nodep);
|
||||
m_constXCvt = true;
|
||||
VL_RESTORER(m_constXCvt);
|
||||
{
|
||||
m_constXCvt = false; // Avoid losing the X's in casex
|
||||
iterateChildren(nodep);
|
||||
}
|
||||
}
|
||||
void visitEqNeqCase(AstNodeBiop* nodep) {
|
||||
UINFO(4, " N/EQCASE->EQ " << nodep << endl);
|
||||
|
@ -37,6 +37,18 @@ module t(/*AUTOARG*/
|
||||
reg [5:0] result_59_3;
|
||||
reg [6:0] result_70_3;
|
||||
|
||||
initial begin
|
||||
if ($countbits(32'b111100000000, '1) != 4) $stop;
|
||||
if ($countbits(32'b111100000000, '0) != 28) $stop;
|
||||
if ($countbits(32'b111100000000, '0, '1) != 32) $stop;
|
||||
if ($countbits(4'bxxx0, 'x) != 3) $stop;
|
||||
if ($countbits(4'bzzz0, 'z) != 3) $stop;
|
||||
if ($countbits(4'b1zz0, 'z, '0) != 3) $stop;
|
||||
if ($countbits(4'b1xx0, 'x, '0) != 3) $stop;
|
||||
if ($countbits(4'b1xx0, 'x, '0, '1) != 4) $stop;
|
||||
if ($countbits(4'bzzx0, 'x, 'z) != 3) $stop;
|
||||
end
|
||||
|
||||
always @* begin
|
||||
result_16_1 = $countbits(in16, ctrl0);
|
||||
result_16_2 = $countbits(in16, ctrl0, ctrl1);
|
||||
@ -73,11 +85,13 @@ module t(/*AUTOARG*/
|
||||
if ($countbits(32'b1100x01z101, 'x, 'z) != 2) $stop;
|
||||
if ($countbits(32'b1100x01z101, 'x, 'z, '1) != 7) $stop;
|
||||
|
||||
`ifndef VERILATOR // Unsup
|
||||
if ($countbits(val, '1) != 7) $stop;
|
||||
if ($countones(val) != 7) $stop;
|
||||
if ($countbits(val, '0) != 25) $stop;
|
||||
if ($countbits(val, '0, '1) != 32) $stop;
|
||||
`ifndef VERILATOR // Unsup
|
||||
if ($countbits(val, 'x) != 0) $stop;
|
||||
if ($countbits(val, 'z) != 0) $stop;
|
||||
if ($countbits(val, 'x, 'z) != 0) $stop;
|
||||
`endif
|
||||
end
|
||||
|
Loading…
Reference in New Issue
Block a user