From 5021989cb6d688cd2fb86d5c8f95f2a0bd036ec8 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 30 Nov 2024 19:04:31 -0500 Subject: [PATCH] Tests: Rename interface-to-wire (#5649 test partial) --- test_regress/t/t_iface_wire_bad.out | 5 ----- test_regress/t/t_iface_wire_bad_param.out | 5 ----- test_regress/t/t_interface_wire_bad.out | 5 +++++ .../t/{t_iface_wire_bad.py => t_interface_wire_bad.py} | 0 .../t/{t_iface_wire_bad.v => t_interface_wire_bad.v} | 1 + test_regress/t/t_interface_wire_bad_param.out | 5 +++++ ...iface_wire_bad_param.py => t_interface_wire_bad_param.py} | 0 ...t_iface_wire_bad_param.v => t_interface_wire_bad_param.v} | 1 + 8 files changed, 12 insertions(+), 10 deletions(-) delete mode 100644 test_regress/t/t_iface_wire_bad.out delete mode 100644 test_regress/t/t_iface_wire_bad_param.out create mode 100644 test_regress/t/t_interface_wire_bad.out rename test_regress/t/{t_iface_wire_bad.py => t_interface_wire_bad.py} (100%) rename test_regress/t/{t_iface_wire_bad.v => t_interface_wire_bad.v} (94%) create mode 100644 test_regress/t/t_interface_wire_bad_param.out rename test_regress/t/{t_iface_wire_bad_param.py => t_interface_wire_bad_param.py} (100%) rename test_regress/t/{t_iface_wire_bad_param.v => t_interface_wire_bad_param.v} (95%) diff --git a/test_regress/t/t_iface_wire_bad.out b/test_regress/t/t_iface_wire_bad.out deleted file mode 100644 index f0d4767da..000000000 --- a/test_regress/t/t_iface_wire_bad.out +++ /dev/null @@ -1,5 +0,0 @@ -%Error: t/t_iface_wire_bad.v:16:20: Operator ASSIGNW expected non-interface on Assign RHS but 'a__Viftop' is an interface. - : ... note: In instance 't' - 16 | wire wbad = sub.a; - | ^ -%Error: Exiting due to diff --git a/test_regress/t/t_iface_wire_bad_param.out b/test_regress/t/t_iface_wire_bad_param.out deleted file mode 100644 index ff54bf85d..000000000 --- a/test_regress/t/t_iface_wire_bad_param.out +++ /dev/null @@ -1,5 +0,0 @@ -%Error: Internal Error: t/t_iface_wire_bad_param.v:16:20: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): 'm_varp && !m_varp->brokeExists()' @ ./V3Ast__gen_impl.h:# - : ... note: In instance 't' - 16 | wire wbad = sub.a; - | ^ - ... See the manual at https://verilator.org/verilator_doc.html for more assistance. diff --git a/test_regress/t/t_interface_wire_bad.out b/test_regress/t/t_interface_wire_bad.out new file mode 100644 index 000000000..c792bf9b6 --- /dev/null +++ b/test_regress/t/t_interface_wire_bad.out @@ -0,0 +1,5 @@ +%Error: t/t_interface_wire_bad.v:17:20: Operator ASSIGNW expected non-interface on Assign RHS but 'a__Viftop' is an interface. + : ... note: In instance 't' + 17 | wire wbad = sub.a; + | ^ +%Error: Exiting due to diff --git a/test_regress/t/t_iface_wire_bad.py b/test_regress/t/t_interface_wire_bad.py similarity index 100% rename from test_regress/t/t_iface_wire_bad.py rename to test_regress/t/t_interface_wire_bad.py diff --git a/test_regress/t/t_iface_wire_bad.v b/test_regress/t/t_interface_wire_bad.v similarity index 94% rename from test_regress/t/t_iface_wire_bad.v rename to test_regress/t/t_interface_wire_bad.v index 5a01c4e64..d4401b6e1 100644 --- a/test_regress/t/t_iface_wire_bad.v +++ b/test_regress/t/t_interface_wire_bad.v @@ -13,5 +13,6 @@ endmodule module t; Sub sub(); + // Issue #5649 wire wbad = sub.a; endmodule diff --git a/test_regress/t/t_interface_wire_bad_param.out b/test_regress/t/t_interface_wire_bad_param.out new file mode 100644 index 000000000..7aebb6752 --- /dev/null +++ b/test_regress/t/t_interface_wire_bad_param.out @@ -0,0 +1,5 @@ +%Error: Internal Error: t/t_interface_wire_bad_param.v:17:20: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): 'm_varp && !m_varp->brokeExists()' @ ./V3Ast__gen_impl.h:# + : ... note: In instance 't' + 17 | wire wbad = sub.a; + | ^ + ... See the manual at https://verilator.org/verilator_doc.html for more assistance. diff --git a/test_regress/t/t_iface_wire_bad_param.py b/test_regress/t/t_interface_wire_bad_param.py similarity index 100% rename from test_regress/t/t_iface_wire_bad_param.py rename to test_regress/t/t_interface_wire_bad_param.py diff --git a/test_regress/t/t_iface_wire_bad_param.v b/test_regress/t/t_interface_wire_bad_param.v similarity index 95% rename from test_regress/t/t_iface_wire_bad_param.v rename to test_regress/t/t_interface_wire_bad_param.v index d814123ea..5399bbd9a 100644 --- a/test_regress/t/t_iface_wire_bad_param.v +++ b/test_regress/t/t_interface_wire_bad_param.v @@ -13,5 +13,6 @@ endmodule module t; Sub #(0) sub(); + // Issue #5649 wire wbad = sub.a; endmodule