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Add -Wpedantic for compliance testing.
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@ -4,10 +4,12 @@ The contributors that suggested a given feature are shown in []. Thanks!
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* Verilator 4.023 devel
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**** Fix for loop missing initializer, bug1605. [Andrew Holme]
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**** Add -Wpedantic for compliance testing.
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**** Add error on redefining preprocessor directives. [Piotr Binkowski]
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**** Fix for loop missing initializer, bug1605. [Andrew Holme]
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* Verilator 4.022 2019-11-10
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@ -398,9 +398,10 @@ detailed descriptions in L</"VERILATION ARGUMENTS"> for more information.
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-Werror-<message> Convert warnings to errors
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-Wfuture-<message> Disable unknown message warnings
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-Wno-<message> Disable warning
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-Wno-fatal Disable fatal exit on warnings
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-Wno-lint Disable all lint warnings
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-Wno-style Disable all style warnings
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-Wno-fatal Disable fatal exit on warnings
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-Wpedantic Warn on compliance-test issues
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--x-assign <mode> Assign non-initial Xs to this value
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--x-initial <mode> Assign initial Xs to this value
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--x-initial-edge Enable initial X->0 and X->1 edge triggers
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@ -511,10 +512,10 @@ calls.
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=item --bbox-sys
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Black box any unknown $system task or function calls. System tasks will be
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simply NOPed, and system functions will be replaced by unsized zero.
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Arguments to such functions will be parsed, but not otherwise checked.
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This prevents errors when linting in the presence of company specific PLI
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calls.
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simply become no-operations, and system functions will be replaced by
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unsized zero. Arguments to such functions will be parsed, but not
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otherwise checked. This prevents errors when linting in the presence of
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company specific PLI calls.
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=item --bbox-unsup
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@ -1525,6 +1526,14 @@ Disable the specified warning message, or in some cases where noted here
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disable an error. This will override any lint_on directives in the source,
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i.e. the warning will still not be printed.
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=item -Wno-fatal
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When warnings are detected, print them, but do not exit the simulator.
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Having warning messages in builds is sloppy. It is strongly recommended
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you cleanup your code, use inline lint_off, or use -Wno-... flags rather
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than using this option.
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=item -Wno-lint
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Disable all lint related warning messages, and all style warnings. This is
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@ -1545,13 +1554,12 @@ already disabled). This is equivalent to "-Wno-DECLFILENAME -Wno-DEFPARAM
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-Wno-IMPORTSTAR -Wno-INCABSPATH -Wno-PINCONNECTEMPTY -Wno-PINNOCONNECT
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-Wno-SYNCASYNCNET -Wno-UNDRIVEN -Wno-UNUSED -Wno-VARHIDDEN".
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=item -Wno-fatal
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=item -Wpedantic
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When warnings are detected, print them, but do not exit the simulator.
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Having warning messages in builds is sloppy. It is strongly recommended
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you cleanup your code, use inline lint_off, or use -Wno-... flags rather
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than using this option.
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Warn on any construct demanded by IEEE, and disable all Verilator
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extensions that may interfere with IEEE compliance to the standard defined
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with --language (etc). Similar to GCC's -Wpedantic. Rarely used, and
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intended only for strict compliance tests.
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=item -Wwarn-I<message>
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@ -175,12 +175,15 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
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while (*textp && (isspace(*textp) || *textp=='"')) textp++;
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// Grab linenumber
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bool fail = false;
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const char* ln = textp;
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while (*textp && !isspace(*textp)) textp++;
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if (isdigit(*ln)) {
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lineno(atoi(ln));
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}
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while (*textp && (isspace(*textp) || *textp=='"')) textp++;
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} else fail = true;
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while (*textp && (isspace(*textp))) textp++;
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if (*textp != '"') fail = true;
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while (*textp && (isspace(*textp) || *textp == '"')) textp++;
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// Grab filename
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const char* fn = textp;
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@ -189,12 +192,21 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
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string strfn = fn;
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strfn = strfn.substr(0, textp-fn);
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filename(strfn);
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}
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} else fail = true;
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// Grab level
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while (*textp && (isspace(*textp) || *textp=='"')) textp++;
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if (isdigit(*textp)) enterExitRef = atoi(textp);
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else enterExitRef = 0;
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if (isdigit(*textp)) {
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enterExitRef = atoi(textp);
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if (enterExitRef >= 3) fail = true;
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} else {
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enterExitRef = 0;
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fail = true;
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}
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if (fail && v3Global.opt.pedantic()) {
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v3error("`line was not properly formed with '`line number \"filename\" level'\n");
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}
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//printf ("PPLINE %d '%s'\n", s_lineno, s_filename.c_str());
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}
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@ -796,6 +796,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
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else if ( onoff (sw, "-trace-underscore", flag/*ref*/)) { m_traceUnderscore = flag; }
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else if ( onoff (sw, "-underline-zero", flag/*ref*/)) { m_underlineZero = flag; } // Undocumented, old Verilator-2
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else if ( onoff (sw, "-vpi", flag/*ref*/)) { m_vpi = flag; }
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else if ( onoff (sw, "-Wpedantic", flag/*ref*/)) { m_pedantic = flag; }
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else if ( onoff (sw, "-x-initial-edge", flag/*ref*/)) { m_xInitialEdge = flag; }
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else if ( onoff (sw, "-xml-only", flag/*ref*/)) { m_xmlOnly = flag; } // Undocumented, still experimental
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// Optimization
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@ -1456,6 +1457,7 @@ V3Options::V3Options() {
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m_makePhony = false;
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m_orderClockDly = true;
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m_outFormatOk = false;
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m_pedantic = false;
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m_pinsBv = 65;
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m_pinsScUint = false;
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m_pinsScBigUint = false;
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@ -163,6 +163,7 @@ class V3Options {
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bool m_gmake; // main switch: --make gmake
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bool m_orderClockDly;// main switch: --order-clock-delay
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bool m_outFormatOk; // main switch: --cc, --sc or --sp was specified
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bool m_pedantic; // main switch: --Wpedantic
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bool m_pinsScUint; // main switch: --pins-sc-uint
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bool m_pinsScBigUint;// main switch: --pins-sc-biguint
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bool m_pinsUint8; // main switch: --pins-uint8
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@ -348,6 +349,7 @@ class V3Options {
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bool orderClockDly() const { return m_orderClockDly; }
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bool outFormatOk() const { return m_outFormatOk; }
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bool keepTempFiles() const { return (V3Error::debugDefault()!=0); }
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bool pedantic() const { return m_pedantic; }
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bool pinsScUint() const { return m_pinsScUint; }
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bool pinsScBigUint() const { return m_pinsScBigUint; }
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bool pinsUint8() const { return m_pinsUint8; }
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@ -1023,6 +1023,7 @@ void V3ParseImp::lexToken() {
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}
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else if (token == yGLOBAL__LEX) {
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if (nexttok == yCLOCKING) token = yGLOBAL__CLOCKING;
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else if (v3Global.opt.pedantic()) token = yGLOBAL__ETC;
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// Avoid 2009 "global" conflicting with old code when we can
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else { token = yaID__LEX; yylval.strp = PARSEP->newString("global"); }
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}
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@ -383,6 +383,7 @@ class AstSenTree;
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%token<fl> yGENERATE "generate"
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%token<fl> yGENVAR "genvar"
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%token<fl> yGLOBAL__CLOCKING "global-then-clocking"
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%token<fl> yGLOBAL__ETC "global"
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%token<fl> yGLOBAL__LEX "global-in-lex"
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%token<fl> yIF "if"
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%token<fl> yIFF "iff"
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4
test_regress/t/t_flag_wpedantic_bad.out
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4
test_regress/t/t_flag_wpedantic_bad.out
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%Error: t/t_flag_wpedantic_bad.v:7: syntax error, unexpected global, expecting IDENTIFIER or do or final
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reg global;
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^
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%Error: Exiting due to
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test_regress/t/t_flag_wpedantic_bad.pl
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test_regress/t/t_flag_wpedantic_bad.pl
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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scenarios(vlt => 1);
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lint(
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verilator_flags2 => ["-Wpedantic"],
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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test_regress/t/t_flag_wpedantic_bad.v
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8
test_regress/t/t_flag_wpedantic_bad.v
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2019 by Wilson Snyder.
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module t (/*AUTOARG*/);
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reg global;
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endmodule
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test_regress/t/t_pp_line_bad.out
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15
test_regress/t/t_pp_line_bad.out
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@ -0,0 +1,15 @@
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%Error: t/t_pp_line_bad.v:100: `line was not properly formed with '`line number "filename" level'
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`line 100
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^
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%Error: somefile:100: `line was not properly formed with '`line number "filename" level'
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`line 100
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^
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%Error: somefile:100: `line was not properly formed with '`line number "filename" level'
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%Error-internal-no-contents
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^
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%Error: t/t_pp_line_bad.v:6: Define or directive not defined: '`line'
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`line
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^~~~~
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%Error: somefile:100: `line was not properly formed with '`line number "filename" level'
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t/t_pp_line_bad.v:101: ... note: In file included from t_pp_line_bad.v
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%Error: Exiting due to
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test_regress/t/t_pp_line_bad.pl
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test_regress/t/t_pp_line_bad.pl
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#!/usr/bin/perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2003 by Wilson Snyder. This program is free software; you can
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# redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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scenarios(vlt => 1);
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lint(
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verilator_flags2 => ["-Wpedantic"],
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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test_regress/t/t_pp_line_bad.v
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10
test_regress/t/t_pp_line_bad.v
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2019 by Wilson Snyder.
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`line
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`line 100
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`line 100 somefile 1
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`line 100 "somefile"
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`line 100 "somefile" 3
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