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Fix shift to remove operation side effects (#4563).
This commit is contained in:
Wilson Snyder
parent
3940a214d0
commit
46f8a659b3
1
Changes
1
Changes
@ -38,6 +38,7 @@ Verilator 5.017 devel
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* Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
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* Fix broken link error for enum references (#4551). [Anthony Donlon]
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* Fix instance arrays connecting to array of structs (#4557). [raphmaster]
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* Fix shift to remove operation side effects (#4563).
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* Fix preprocessor to show `line 2 on resumed file.
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@ -1647,10 +1647,20 @@ static inline void _vl_shiftl_inplace_w(int obits, WDataOutP iowp,
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// EMIT_RULE: VL_SHIFTL: oclean=lclean; rclean==clean;
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// Important: Unlike most other funcs, the shift might well be a computed
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// expression. Thus consider this when optimizing. (And perhaps have 2 funcs?)
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// If RHS (rd/rwp) is larger than the output, zeros (or all ones for >>>) must be returned
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// (This corresponds to AstShift*Ovr Ast nodes)
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static inline IData VL_SHIFTL_III(int obits, int, int, IData lhs, IData rhs) VL_MT_SAFE {
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if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
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return lhs << rhs; // Small is common so not clean return
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}
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static inline IData VL_SHIFTL_IIQ(int obits, int, int, IData lhs, QData rhs) VL_MT_SAFE {
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if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
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return VL_CLEAN_II(obits, obits, lhs << rhs);
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}
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static inline QData VL_SHIFTL_QQI(int obits, int, int, QData lhs, IData rhs) VL_MT_SAFE {
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if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
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return lhs << rhs; // Small is common so not clean return
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}
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static inline QData VL_SHIFTL_QQQ(int obits, int, int, QData lhs, QData rhs) VL_MT_SAFE {
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if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
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return VL_CLEAN_QQ(obits, obits, lhs << rhs);
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@ -1692,7 +1702,7 @@ static inline IData VL_SHIFTL_IIW(int obits, int, int rbits, IData lhs,
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return 0;
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}
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}
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return VL_CLEAN_II(obits, obits, lhs << rwp[0]);
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return VL_SHIFTL_III(obits, obits, 32, lhs, rwp[0]);
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}
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static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs,
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WDataInP const rwp) VL_MT_SAFE {
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@ -1702,16 +1712,24 @@ static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs,
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}
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}
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// Above checks rwp[1]==0 so not needed in below shift
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return VL_CLEAN_QQ(obits, obits, lhs << (static_cast<QData>(rwp[0])));
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return VL_SHIFTL_QQI(obits, obits, 32, lhs, rwp[0]);
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}
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// EMIT_RULE: VL_SHIFTR: oclean=lclean; rclean==clean;
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// Important: Unlike most other funcs, the shift might well be a computed
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// expression. Thus consider this when optimizing. (And perhaps have 2 funcs?)
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static inline IData VL_SHIFTR_III(int obits, int, int, IData lhs, IData rhs) VL_PURE {
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if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
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return lhs >> rhs; // Small is common so assumed not clean
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}
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static inline IData VL_SHIFTR_IIQ(int obits, int, int, IData lhs, QData rhs) VL_PURE {
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if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
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return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
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}
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static inline QData VL_SHIFTR_QQI(int obits, int, int, QData lhs, IData rhs) VL_PURE {
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if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
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return lhs >> rhs; // Small is common so assumed not clean
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}
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static inline QData VL_SHIFTR_QQQ(int obits, int, int, QData lhs, QData rhs) VL_PURE {
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if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
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return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
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@ -1761,15 +1779,14 @@ static inline IData VL_SHIFTR_IIW(int obits, int, int rbits, IData lhs,
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for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
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if (VL_UNLIKELY(rwp[i])) return 0; // Huge shift 1>>32 or more
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}
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return VL_CLEAN_II(obits, obits, lhs >> rwp[0]);
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return VL_SHIFTR_III(obits, obits, 32, lhs, rwp[0]);
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}
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static inline QData VL_SHIFTR_QQW(int obits, int, int rbits, QData lhs,
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WDataInP const rwp) VL_PURE {
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for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
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if (VL_UNLIKELY(rwp[i])) return 0; // Huge shift 1>>32 or more
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}
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// Above checks rwp[1]==0 so not needed in below shift
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return VL_CLEAN_QQ(obits, obits, lhs >> (static_cast<QData>(rwp[0])));
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return VL_SHIFTR_QQI(obits, obits, 32, lhs, rwp[0]);
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}
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// EMIT_RULE: VL_SHIFTRS: oclean=false; lclean=clean, rclean==clean;
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@ -1779,11 +1796,13 @@ static inline IData VL_SHIFTRS_III(int obits, int lbits, int, IData lhs, IData r
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// must use lbits for sign; lbits might != obits,
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// an EXTEND(SHIFTRS(...)) can became a SHIFTRS(...) within same 32/64 bit word length
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const IData sign = -(lhs >> (lbits - 1)); // ffff_ffff if negative
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if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return sign & VL_MASK_I(obits);
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const IData signext = ~(VL_MASK_I(lbits) >> rhs); // One with bits where we've shifted "past"
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return (lhs >> rhs) | (sign & VL_CLEAN_II(obits, obits, signext));
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}
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static inline QData VL_SHIFTRS_QQI(int obits, int lbits, int, QData lhs, IData rhs) VL_PURE {
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const QData sign = -(lhs >> (lbits - 1));
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if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return sign & VL_MASK_Q(obits);
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const QData signext = ~(VL_MASK_Q(lbits) >> rhs);
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return (lhs >> rhs) | (sign & VL_CLEAN_QQ(obits, obits, signext));
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}
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@ -3279,6 +3279,30 @@ public:
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bool sizeMattersLhs() const override { return true; }
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bool sizeMattersRhs() const override { return false; }
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};
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class AstShiftLOvr final : public AstNodeBiop {
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// Like ShiftL but checks for an over shift and returns zeros
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// TODO: All Verilog shifts should start as these and later get demoted to AstShiftL
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public:
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AstShiftLOvr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
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: ASTGEN_SUPER_ShiftLOvr(fl, lhsp, rhsp) {
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if (setwidth) dtypeSetLogicSized(setwidth, VSigning::UNSIGNED);
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}
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ASTGEN_MEMBERS_AstShiftLOvr;
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AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
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return new AstShiftLOvr{fileline(), lhsp, rhsp};
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}
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void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
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out.opShiftL(lhs, rhs);
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}
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string emitVerilog() override { return "%k(%l %f<< %r)"; }
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string emitC() override { return "VL_SHIFTL_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
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string emitSimpleOperator() override { return ""; }
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bool cleanOut() const override { return false; }
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bool cleanLhs() const override { return false; }
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bool cleanRhs() const override { return true; }
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bool sizeMattersLhs() const override { return true; }
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bool sizeMattersRhs() const override { return false; }
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};
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class AstShiftR final : public AstNodeBiop {
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public:
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AstShiftR(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
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@ -3304,6 +3328,31 @@ public:
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bool sizeMattersLhs() const override { return false; }
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bool sizeMattersRhs() const override { return false; }
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};
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class AstShiftROvr final : public AstNodeBiop {
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// Like ShiftR but checks for an over shift and returns zeros
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// TODO: All Verilog shifts should start as these and later get demoted to AstShiftR
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public:
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AstShiftROvr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
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: ASTGEN_SUPER_ShiftROvr(fl, lhsp, rhsp) {
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if (setwidth) dtypeSetLogicSized(setwidth, VSigning::UNSIGNED);
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}
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ASTGEN_MEMBERS_AstShiftROvr;
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AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
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return new AstShiftROvr{fileline(), lhsp, rhsp};
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}
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void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
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out.opShiftR(lhs, rhs);
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}
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string emitVerilog() override { return "%k(%l %f>> %r)"; }
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string emitC() override { return "VL_SHIFTR_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
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string emitSimpleOperator() override { return ""; }
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bool cleanOut() const override { return false; }
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bool cleanLhs() const override { return true; }
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bool cleanRhs() const override { return true; }
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// LHS size might be > output size, so don't want to force size
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bool sizeMattersLhs() const override { return false; }
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bool sizeMattersRhs() const override { return false; }
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};
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class AstShiftRS final : public AstNodeBiop {
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// Shift right with sign extension, >>> operator
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// Output data type's width determines which bit is used for sign extension
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@ -3330,6 +3379,33 @@ public:
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bool sizeMattersRhs() const override { return false; }
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bool signedFlavor() const override { return true; }
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};
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class AstShiftRSOvr final : public AstNodeBiop {
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// Shift right with sign extension, >>> operator, checks for an over shift and returns zeros
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// Output data type's width determines which bit is used for sign extension
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// TODO: All Verilog shifts should start as these and later get demoted to AstShiftRSOvr
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public:
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AstShiftRSOvr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
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: ASTGEN_SUPER_ShiftRSOvr(fl, lhsp, rhsp) {
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// Important that widthMin be correct, as opExtend requires it after V3Expand
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if (setwidth) dtypeSetLogicSized(setwidth, VSigning::SIGNED);
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}
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ASTGEN_MEMBERS_AstShiftRSOvr;
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AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
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return new AstShiftRSOvr{fileline(), lhsp, rhsp};
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}
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void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
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out.opShiftRS(lhs, rhs, lhsp()->widthMinV());
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}
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string emitVerilog() override { return "%k(%l %f>>> %r)"; }
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string emitC() override { return "VL_SHIFTRS_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
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string emitSimpleOperator() override { return ""; }
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bool cleanOut() const override { return false; }
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bool cleanLhs() const override { return true; }
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bool cleanRhs() const override { return true; }
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bool sizeMattersLhs() const override { return false; }
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bool sizeMattersRhs() const override { return false; }
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bool signedFlavor() const override { return true; }
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};
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class AstSub final : public AstNodeBiop {
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public:
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AstSub(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp)
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@ -3391,9 +3391,12 @@ private:
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TREEOP ("AstPowUS {$lhsp.isZero, !$rhsp.isZero}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstPowSU {$lhsp.isZero, !$rhsp.isZero}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstOr {$lhsp.isZero, $rhsp}", "replaceWRhs(nodep)");
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TREEOP ("AstShiftL{$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftR{$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftRS{$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftL {$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftLOvr {$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftR {$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftROvr {$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftRS {$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstShiftRSOvr{$lhsp.isZero, $rhsp}", "replaceZeroChkPure(nodep,$rhsp)");
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TREEOP ("AstXor {$lhsp.isZero, $rhsp}", "replaceWRhs(nodep)");
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TREEOP ("AstSub {$lhsp.isZero, $rhsp}", "AstNegate{$rhsp}");
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TREEOP ("AstAdd {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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@ -3403,9 +3406,12 @@ private:
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TREEOP ("AstMul {$lhsp, $rhsp.isZero}", "replaceZeroChkPure(nodep,$lhsp)");
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TREEOP ("AstMulS {$lhsp, $rhsp.isZero}", "replaceZeroChkPure(nodep,$lhsp)");
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TREEOP ("AstOr {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftL{$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftR{$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftRS{$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftL {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftLOvr {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftR {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftROvr {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftRS {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstShiftRSOvr{$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstSub {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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TREEOP ("AstXor {$lhsp, $rhsp.isZero}", "replaceWLhs(nodep)");
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// Non-zero on one side or the other
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@ -3500,8 +3506,10 @@ private:
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TREEOPV("AstNot {$lhsp.castGteS, $lhsp.width1}", "AstLtS {$lhsp->castGteS()->lhsp(),$lhsp->castGteS()->rhsp()}");
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TREEOP ("AstLogNot{$lhsp.castGteS}", "AstLtS {$lhsp->castGteS()->lhsp(),$lhsp->castGteS()->rhsp()}");
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// Not common, but avoids compiler warnings about over shifting
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TREEOP ("AstShiftL{operandHugeShiftL(nodep)}", "replaceZero(nodep)");
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TREEOP ("AstShiftR{operandHugeShiftR(nodep)}", "replaceZero(nodep)");
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TREEOP ("AstShiftL {operandHugeShiftL(nodep)}", "replaceZero(nodep)");
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TREEOP ("AstShiftLOvr{operandHugeShiftL(nodep)}", "replaceZero(nodep)");
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TREEOP ("AstShiftR {operandHugeShiftR(nodep)}", "replaceZero(nodep)");
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TREEOP ("AstShiftROvr{operandHugeShiftR(nodep)}", "replaceZero(nodep)");
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TREEOP ("AstShiftL{operandShiftOp(nodep)}", "replaceShiftOp(nodep)");
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TREEOP ("AstShiftR{operandShiftOp(nodep)}", "replaceShiftOp(nodep)");
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TREEOP ("AstShiftL{operandShiftShift(nodep)}", "replaceShiftShift(nodep)");
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@ -49,11 +49,8 @@ class PremitVisitor final : public VNVisitor {
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private:
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// NODE STATE
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// AstNodeExpr::user() -> bool. True if iterated already
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// AstShiftL::user2() -> bool. True if converted to conditional
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// AstShiftR::user2() -> bool. True if converted to conditional
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// *::user3() -> Used when visiting AstNodeAssign
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const VNUser1InUse m_inuser1;
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const VNUser2InUse m_inuser2;
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// STATE - across all visitors
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VDouble0 m_extractedToConstPool; // Statistic tracking
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@ -236,47 +233,33 @@ private:
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}
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void visitShift(AstNodeBiop* nodep) {
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// Shifts of > 32/64 bits in C++ will wrap-around and generate non-0s
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if (!nodep->user2SetOnce()) {
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UINFO(4, " ShiftFix " << nodep << endl);
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const AstConst* const shiftp = VN_CAST(nodep->rhsp(), Const);
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if (shiftp && shiftp->num().mostSetBitP1() > 32) {
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shiftp->v3error(
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"Unsupported: Shifting of by over 32-bit number isn't supported."
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<< " (This isn't a shift of 32 bits, but a shift of 2^32, or 4 billion!)\n");
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}
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if (nodep->widthMin() <= 64 // Else we'll use large operators which work right
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// C operator's width must be < maximum shift which is
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// based on Verilog width
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&& nodep->width() < (1LL << nodep->rhsp()->widthMin())) {
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VNRelinker replaceHandle;
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nodep->unlinkFrBack(&replaceHandle);
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AstNodeExpr* constzerop;
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const int m1value
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= nodep->widthMin() - 1; // Constant of width-1; not changing dtype width
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if (nodep->signedFlavor()) {
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// Then over shifting gives the sign bit, not all zeros
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// Note *NOT* clean output -- just like normal shift!
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// Create equivalent of VL_SIGNONES_(node_width)
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constzerop = new AstNegate{
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nodep->fileline(),
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new AstShiftR{nodep->fileline(), nodep->lhsp()->cloneTreePure(false),
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new AstConst(nodep->fileline(), m1value), nodep->width()}};
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} else {
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constzerop = new AstConst{nodep->fileline(), AstConst::WidthedValue{},
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nodep->width(), 0};
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}
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constzerop->dtypeFrom(nodep); // unsigned
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AstNodeExpr* const constwidthp
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= new AstConst(nodep->fileline(), AstConst::WidthedValue{},
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nodep->rhsp()->widthMin(), m1value);
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constwidthp->dtypeFrom(nodep->rhsp()); // unsigned
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AstCond* const newp = new AstCond{nodep->fileline(),
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new AstGte{nodep->fileline(), constwidthp,
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nodep->rhsp()->cloneTreePure(false)},
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nodep, constzerop};
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replaceHandle.relink(newp);
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UINFO(4, " ShiftFix " << nodep << endl);
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const AstConst* const shiftp = VN_CAST(nodep->rhsp(), Const);
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if (shiftp && shiftp->num().mostSetBitP1() > 32) {
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shiftp->v3error(
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"Unsupported: Shifting of by over 32-bit number isn't supported."
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<< " (This isn't a shift of 32 bits, but a shift of 2^32, or 4 billion!)\n");
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}
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if (nodep->widthMin() <= 64 // Else we'll use large operators which work right
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// C operator's width must be < maximum shift which is
|
||||
// based on Verilog width
|
||||
&& nodep->width() < (1LL << nodep->rhsp()->widthMin())) {
|
||||
AstNode* newp;
|
||||
if (VN_IS(nodep, ShiftL)) {
|
||||
newp = new AstShiftLOvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
|
||||
nodep->rhsp()->unlinkFrBack()};
|
||||
} else if (VN_IS(nodep, ShiftR)) {
|
||||
newp = new AstShiftROvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
|
||||
nodep->rhsp()->unlinkFrBack()};
|
||||
} else {
|
||||
UASSERT_OBJ(VN_IS(nodep, ShiftRS), nodep, "Bad case");
|
||||
newp = new AstShiftRSOvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
|
||||
nodep->rhsp()->unlinkFrBack()};
|
||||
}
|
||||
newp->dtypeFrom(nodep);
|
||||
nodep->replaceWith(newp);
|
||||
VL_DO_DANGLING(pushDeletep(nodep), nodep);
|
||||
return;
|
||||
}
|
||||
iterateChildren(nodep);
|
||||
checkNode(nodep);
|
||||
@ -403,9 +386,6 @@ public:
|
||||
}
|
||||
};
|
||||
|
||||
//----------------------------------------------------------------------
|
||||
// Top loop
|
||||
|
||||
//######################################################################
|
||||
// Premit class functions
|
||||
|
||||
|
||||
@ -20,7 +20,7 @@ execute(
|
||||
);
|
||||
|
||||
if ($Self->{vlt}) {
|
||||
file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 39);
|
||||
file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 36);
|
||||
}
|
||||
ok(1);
|
||||
1;
|
||||
|
||||
@ -21,7 +21,7 @@ execute(
|
||||
);
|
||||
|
||||
if ($Self->{vlt}) {
|
||||
file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 2);
|
||||
file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 1);
|
||||
}
|
||||
ok(1);
|
||||
1;
|
||||
|
||||
21
test_regress/t/t_math_shift_side.pl
Executable file
21
test_regress/t/t_math_shift_side.pl
Executable file
@ -0,0 +1,21 @@
|
||||
#!/usr/bin/env perl
|
||||
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
|
||||
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
|
||||
#
|
||||
# Copyright 2023 by Wilson Snyder. This program is free software; you
|
||||
# can redistribute it and/or modify it under the terms of either the GNU
|
||||
# Lesser General Public License Version 3 or the Perl Artistic License
|
||||
# Version 2.0.
|
||||
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
|
||||
|
||||
scenarios(simulator => 1);
|
||||
|
||||
compile(
|
||||
);
|
||||
|
||||
execute(
|
||||
check_finished => 1,
|
||||
);
|
||||
|
||||
ok(1);
|
||||
1;
|
||||
40
test_regress/t/t_math_shift_side.v
Normal file
40
test_regress/t/t_math_shift_side.v
Normal file
@ -0,0 +1,40 @@
|
||||
// DESCRIPTION: Verilator: Verilog Test module
|
||||
//
|
||||
// This file ONLY is placed under the Creative Commons Public Domain, for
|
||||
// any use, without warranty, 2023 by Wilson Snyder.
|
||||
// SPDX-License-Identifier: CC0-1.0
|
||||
|
||||
class Cls;
|
||||
int m_n_bits;
|
||||
|
||||
function int get_n_bytes;
|
||||
return ((m_n_bits - 1) / 8) + 1;
|
||||
endfunction
|
||||
|
||||
endclass
|
||||
|
||||
module t(/*AUTOARG*/);
|
||||
|
||||
int i;
|
||||
|
||||
initial begin
|
||||
Cls c;
|
||||
c = new;
|
||||
|
||||
c.m_n_bits = 23;
|
||||
if (c.get_n_bytes() != 3) $stop;
|
||||
|
||||
i = 1 << c.get_n_bytes();
|
||||
if (i != 8) $stop;
|
||||
|
||||
i = 32'h1234 >> c.get_n_bytes();
|
||||
if (i != 32'h246) $stop;
|
||||
|
||||
i = 32'shffffffff >>> c.get_n_bytes();
|
||||
if (i != 32'hffffffff) $stop;
|
||||
|
||||
$write("*-* All Finished *-*\n");
|
||||
$finish;
|
||||
end
|
||||
|
||||
endmodule
|
||||
Loading…
Reference in New Issue
Block a user