From 3ffea76e1157b467c8b5d1db97264da29f6aacdb Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 12 Nov 2024 22:11:19 -0500 Subject: [PATCH] Add `--no-std-waiver` and default reading of standard lint waivers file (#5607). --- Changes | 7 +- bin/verilator | 1 + docs/guide/exe_verilator.rst | 8 +- include/verilated.v | 4 +- include/verilated_std.sv | 4 +- include/verilated_std_waiver.vlt | 64 +++++ src/V3FileLine.cpp | 10 +- src/V3Global.cpp | 6 + src/V3Options.cpp | 18 +- src/V3Options.h | 3 + src/V3ParseImp.cpp | 4 +- src/V3Waiver.cpp | 1 + test_regress/t/t_dump_json.out | 430 +++++++++++++++--------------- test_regress/t/t_std_waiver.py | 16 ++ test_regress/t/t_std_waiver.v | 13 + test_regress/t/t_std_waiver_no.py | 16 ++ test_regress/t/t_std_waiver_no.v | 13 + test_regress/t/t_uvm_all.py | 3 - test_regress/t/t_uvm_todo.vlt | 34 --- 19 files changed, 386 insertions(+), 269 deletions(-) create mode 100644 include/verilated_std_waiver.vlt create mode 100755 test_regress/t/t_std_waiver.py create mode 100644 test_regress/t/t_std_waiver.v create mode 100755 test_regress/t/t_std_waiver_no.py create mode 100644 test_regress/t/t_std_waiver_no.v diff --git a/Changes b/Changes index c609790cc..f0d5947e2 100644 --- a/Changes +++ b/Changes @@ -17,9 +17,10 @@ Verilator 5.031 devel * Support basic constrained random for multi-dimensional dynamic array and queue (#5591). [Yilou Wang] * Support vpiDefName (#3906) (#5572). [Krzysztof Starecki] * Support `pure constraint`. -* Add `--no-std-package` as subset-alias of `--no-std`. -* Add `--waiver-multiline` for context-sensitive `--waiver-output`. -* Add `lint_off --contents` in configuration files. (#5606) +* Add `--no-std-waiver` and default reading of standard lint waivers file (#5607). +* Add `--no-std-package` as subset-alias of `--no-std` (#5607). +* Add `lint_off --contents` in configuration files (#5606). +* Add `--waiver-multiline` for context-sensitive `--waiver-output` (#5608). * Add error on illegal enum base type (#3010). [Iztok Jeras] * Add error on `wait` with missing `.triggered` (#4457). * Add error when improperly storing to parameter (#5147). [Gökçe Aydos] diff --git a/bin/verilator b/bin/verilator index 28acbbcf6..4ebb3ddd9 100755 --- a/bin/verilator +++ b/bin/verilator @@ -450,6 +450,7 @@ detailed descriptions of these arguments. --stats-vars Provide statistics on variables --no-std Prevent loading standard files --no-std-package Prevent parsing standard package + --no-std-waiver Prevent parsing standard lint waivers --no-stop-fail Do not call $stop when assertion fails --structs-packed Convert all unpacked structures to packed structures -sv Enable SystemVerilog parsing diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst index c2bec656b..ff680e481 100644 --- a/docs/guide/exe_verilator.rst +++ b/docs/guide/exe_verilator.rst @@ -1364,13 +1364,17 @@ Summary: .. option:: --no-std Prevents parsing standard input files, alias for - :opt:`--no-std-package`. This may be extended to prevent reading other - standardized files in future versions. + :opt:`--no-std-package`, :opt:`--no-std-waiver`. This may be extended + to prevent reading other standardized files in future versions. .. option:: --no-std-package Prevents parsing standard `std::` package file. +.. option:: --no-std-waiver + + Prevents parsing standard lint waivers (`verilated_std_waiver.vlt`). + .. option:: --no-stop-fail Don't call $stop when assertion fails. Simulation will continue. diff --git a/include/verilated.v b/include/verilated.v index dcdb10ccd..a230ca814 100644 --- a/include/verilated.v +++ b/include/verilated.v @@ -12,11 +12,11 @@ // // DESCRIPTION: Verilator: Include in verilog files to hide verilator defines -`ifdef _VERILATED_V_ `else +`ifndef _VERILATED_V_ `define _VERILATED_V_ 1 // Hide verilator pragmas from other tools - `ifdef VERILATOR `else + `ifndef VERILATOR `define coverage_block_off `endif diff --git a/include/verilated_std.sv b/include/verilated_std.sv index 2741f03bc..8a1e2541c 100644 --- a/include/verilated_std.sv +++ b/include/verilated_std.sv @@ -14,8 +14,8 @@ /// \file /// \brief Verilated IEEE std:: header /// -/// This file is included automatically by Verilator when a std::mailbox or -/// std::semaphore is referenced. +/// This file is included automatically by Verilator, unless '--no-std-package' +/// is used. /// /// This file is not part of the Verilated public-facing API. /// It is only for internal use. diff --git a/include/verilated_std_waiver.vlt b/include/verilated_std_waiver.vlt new file mode 100644 index 000000000..7a4bd9b6e --- /dev/null +++ b/include/verilated_std_waiver.vlt @@ -0,0 +1,64 @@ +// DESCRIPTION: Verilator: built-in standard lint waivers +// +// Code available from: https://verilator.org +// +//************************************************************************* +// +// Copyright 2022-2024 by Wilson Snyder. This program is free software; you can +// redistribute it and/or modify it under the terms of either the GNU Lesser +// General Public License Version 3 or the Perl Artistic License Version 2.0. +// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 +// +//************************************************************************* +/// +/// \file +/// \brief Verilated built-in standard lint waivers +/// +/// This file is included automatically by Verilator, unless '--no-std-waiver' +/// is used. +/// +/// To assist in building new rules, use: +/// 'verilator --waiver-multiline --waiver-output ' +/// +//************************************************************************* + +`ifndef _VERILATED_STD_WAIVER_VLT_ +`define _VERILATED_STD_WAIVER_VLT_ + +`verilator_config + +//========================================================================= +// UVM + +// Apply these rules to only UVM base files +`define VLT_UVM_FILES -file "*/uvm_*.svh" -contents "*UVM_VERSION_STRING*" + +// Whole-package file waivers +lint_off -rule DECLFILENAME `VLT_UVM_FILES +lint_off -rule VARHIDDEN `VLT_UVM_FILES +lint_off -rule WIDTHEXPAND `VLT_UVM_FILES +lint_off -rule WIDTHTRUNC `VLT_UVM_FILES + +// Context-sensitive waivers +lint_off -rule CASEINCOMPLETE `VLT_UVM_FILES -match "* case ({is_R, is_W})*" +lint_off -rule CASEINCOMPLETE `VLT_UVM_FILES -match "* case(orig_severity)*" +lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_callback*" +lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_component*" +lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_event*" +lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_report_object*" +lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_sequence_item*" +lint_off -rule MISINDENT `VLT_UVM_FILES -match "* foreach (abstractions[i])*" +lint_off -rule MISINDENT `VLT_UVM_FILES -match "* foreach (lock_list[i])*" +lint_off -rule MISINDENT `VLT_UVM_FILES -match "* rw_access.data=*" +lint_off -rule MISINDENT `VLT_UVM_FILES -match "* uvm_cmdline_proc =*" +lint_off -rule REALCVT `VLT_UVM_FILES -match "* m_time *" +lint_off -rule REALCVT `VLT_UVM_FILES -match "*$realtime*" +lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'delete'*" +lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'list'*" +lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'map'*" +lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'override'*" +lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'volatile'*" + +//========================================================================= +`undef VLT_UVM_FILES +`endif // Guard diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp index f7ac9d65c..64f62dea0 100644 --- a/src/V3FileLine.cpp +++ b/src/V3FileLine.cpp @@ -92,9 +92,13 @@ void FileLineSingleton::fileNameNumMapDumpJson(std::ostream& os) { std::string sep = "\n "; os << "\"files\": {"; for (const auto& itr : m_namemap) { - const std::string name - = itr.first == V3Options::getStdPackagePath() ? "" : itr.first; - os << sep << '"' << filenameLetters(itr.second) << '"' << ": {\"filename\":\"" << name + std::string filename = itr.first; + if (filename == V3Options::getStdPackagePath()) { + filename = ""; + } else if (filename == V3Options::getStdWaiverPath()) { + filename = ""; + } + os << sep << '"' << filenameLetters(itr.second) << '"' << ": {\"filename\":\"" << filename << '"' << ", \"realpath\":\"" << V3OutFormatter::quoteNameControls(V3Os::filenameRealPath(itr.first)) << '"' << ", \"language\":\"" << numberToLang(itr.second).ascii() << "\"}"; diff --git a/src/V3Global.cpp b/src/V3Global.cpp index 924a664e1..e65a00081 100644 --- a/src/V3Global.cpp +++ b/src/V3Global.cpp @@ -58,6 +58,12 @@ void V3Global::readFiles() { V3Parse parser{v3Global.rootp(), &filter, &parseSyms}; + // Parse the std waivers + if (v3Global.opt.stdWaiver()) { + parser.parseFile( + new FileLine{V3Options::getStdWaiverPath()}, V3Options::getStdWaiverPath(), false, + "Cannot find verilated_std_waiver.vlt containing built-in lint waivers: "); + } // Read .vlt files const V3StringSet& vltFiles = v3Global.opt.vltFiles(); for (const string& filename : vltFiles) { diff --git a/src/V3Options.cpp b/src/V3Options.cpp index 47f60520b..2980e3467 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -568,7 +568,7 @@ string V3Options::filePath(FileLine* fl, const string& modname, const string& la // Return "" if not found. const string filename = V3Os::filenameCleanup(VName::dehash(modname)); if (!V3Os::filenameIsRel(filename)) { - // filename is an absolute path, so can find getStdPackagePath() + // filename is an absolute path, so can find getStdPackagePath()/getStdWaiverPath() string exists = filePathCheckOneDir(filename, ""); if (exists != "") return exists; } @@ -631,7 +631,7 @@ void V3Options::filePathLookedMsg(FileLine* fl, const string& modname) { V3LangCode V3Options::fileLanguage(const string& filename) { string ext = V3Os::filenameNonDir(filename); string::size_type pos; - if (filename == V3Options::getStdPackagePath()) { + if (filename == V3Options::getStdPackagePath() || filename == V3Options::getStdWaiverPath()) { return V3LangCode::mostRecent(); } else if ((pos = ext.rfind('.')) != string::npos) { ext.erase(0, pos + 1); @@ -793,6 +793,9 @@ string V3Options::getenvVERILATOR_SOLVER() { string V3Options::getStdPackagePath() { return V3Os::filenameJoin(getenvVERILATOR_ROOT(), "include", "verilated_std.sv"); } +string V3Options::getStdWaiverPath() { + return V3Os::filenameJoin(getenvVERILATOR_ROOT(), "include", "verilated_std_waiver.vlt"); +} string V3Options::getSupported(const string& var) { // If update below, also update V3Options::showVersion() @@ -1258,7 +1261,10 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, DECL_OPTION("-json-edit-nums", OnOff, &m_jsonEditNums); DECL_OPTION("-json-ids", OnOff, &m_jsonIds); DECL_OPTION("-E", CbOnOff, [this](bool flag) { - if (flag) m_stdPackage = false; + if (flag) { + m_stdPackage = false; + m_stdWaiver = false; + } m_preprocOnly = flag; }); DECL_OPTION("-emit-accessors", OnOff, &m_emitAccessors); @@ -1512,8 +1518,12 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, m_statsVars = flag; m_stats |= flag; }); - DECL_OPTION("-std", CbOnOff, [this](bool flag) { m_stdPackage = flag; }); + DECL_OPTION("-std", CbOnOff, [this](bool flag) { + m_stdPackage = flag; + m_stdWaiver = flag; + }); DECL_OPTION("-std-package", OnOff, &m_stdPackage); + DECL_OPTION("-std-waiver", OnOff, &m_stdWaiver); DECL_OPTION("-stop-fail", OnOff, &m_stopFail); DECL_OPTION("-structs-packed", OnOff, &m_structsPacked); DECL_OPTION("-sv", CbCall, [this]() { m_defaultLanguage = V3LangCode::L1800_2023; }); diff --git a/src/V3Options.h b/src/V3Options.h index 3b3b6af5e..c1b295c90 100644 --- a/src/V3Options.h +++ b/src/V3Options.h @@ -280,6 +280,7 @@ private: bool m_reportUnoptflat = false; // main switch: --report-unoptflat bool m_savable = false; // main switch: --savable bool m_stdPackage = true; // main switch: --std-package + bool m_stdWaiver = true; // main switch: --std-waiver bool m_structsPacked = false; // main switch: --structs-packed bool m_systemC = false; // main switch: --sc: System C instead of simple C++ bool m_stats = false; // main switch: --stats @@ -467,6 +468,7 @@ public: bool stats() const { return m_stats; } bool statsVars() const { return m_statsVars; } bool stdPackage() const { return m_stdPackage; } + bool stdWaiver() const { return m_stdWaiver; } bool structsPacked() const { return m_structsPacked; } bool assertOn() const { return m_assert; } // assertOn as __FILE__ may be defined bool assertCaseOn() const { return m_assertCase || m_assert; } @@ -741,6 +743,7 @@ public: static string getenvVERILATOR_ROOT(); static string getenvVERILATOR_SOLVER(); static string getStdPackagePath(); + static string getStdWaiverPath(); static string getSupported(const string& var); static bool systemCSystemWide(); static bool systemCFound(); // SystemC installed, or environment points to it diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp index 39d6ab56c..0458a1735 100644 --- a/src/V3ParseImp.cpp +++ b/src/V3ParseImp.cpp @@ -332,7 +332,9 @@ void V3ParseImp::parseFile(FileLine* fileline, const string& modfilename, bool i } V3Stats::addStatSum(V3Stats::STAT_SOURCE_CHARS, m_ppBytes); - if (debug() && modfilename != V3Options::getStdPackagePath()) dumpInputsFile(); + if (debug() && modfilename != V3Options::getStdPackagePath() + && modfilename != V3Options::getStdWaiverPath()) + dumpInputsFile(); // Parse it if (!v3Global.opt.preprocOnly()) { diff --git a/src/V3Waiver.cpp b/src/V3Waiver.cpp index ca8d26a73..9c10b9c9b 100644 --- a/src/V3Waiver.cpp +++ b/src/V3Waiver.cpp @@ -28,6 +28,7 @@ void V3Waiver::addEntry(V3ErrorCode errorCode, const std::string& filename, const std::string& msg) VL_MT_SAFE_EXCLUDES(s_mutex) { if (filename == V3Options::getStdPackagePath()) return; + if (filename == V3Options::getStdWaiverPath()) return; const V3LockGuard lock{s_mutex}; string trimmsg = msg; diff --git a/test_regress/t/t_dump_json.out b/test_regress/t/t_dump_json.out index 4a302d04d..ac99ae1cd 100644 --- a/test_regress/t/t_dump_json.out +++ b/test_regress/t/t_dump_json.out @@ -1,427 +1,427 @@ {"type":"NETLIST","name":"$root","addr":"(B)","loc":"a,0:0,0:0","timeunit":"1ps","timeprecision":"1ps","typeTablep":"(C)","constPoolp":"(D)","dollarUnitPkgp":"UNLINKED","stdPackagep":"UNLINKED","evalp":"UNLINKED","evalNbap":"UNLINKED","dpiExportTriggerp":"UNLINKED","delaySchedulerp":"UNLINKED","nbaEventp":"UNLINKED","nbaEventTriggerp":"UNLINKED","topScopep":"UNLINKED", "modulesp": [ - {"type":"MODULE","name":"t","addr":"(E)","loc":"d,7:8,7:9","origName":"t","level":2,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [], + {"type":"MODULE","name":"t","addr":"(E)","loc":"e,7:8,7:9","origName":"t","level":2,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [], "stmtsp": [ - {"type":"PORT","name":"clk","addr":"(F)","loc":"d,9:4,9:7","exprp": []}, - {"type":"VAR","name":"clk","addr":"(G)","loc":"d,11:10,11:13","dtypep":"UNLINKED","origName":"clk","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", + {"type":"PORT","name":"clk","addr":"(F)","loc":"e,9:4,9:7","exprp": []}, + {"type":"VAR","name":"clk","addr":"(G)","loc":"e,11:10,11:13","dtypep":"UNLINKED","origName":"clk","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", "childDTypep": [ - {"type":"BASICDTYPE","name":"LOGIC_IMPLICIT","addr":"(H)","loc":"d,11:10,11:13","dtypep":"(H)","keyword":"LOGIC_IMPLICIT","generic":false,"rangep": []} + {"type":"BASICDTYPE","name":"LOGIC_IMPLICIT","addr":"(H)","loc":"e,11:10,11:13","dtypep":"(H)","keyword":"LOGIC_IMPLICIT","generic":false,"rangep": []} ],"delayp": [],"valuep": [],"attrsp": []}, - {"type":"VAR","name":"cyc","addr":"(I)","loc":"d,13:12,13:15","dtypep":"UNLINKED","origName":"cyc","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"VAR","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", + {"type":"VAR","name":"cyc","addr":"(I)","loc":"e,13:12,13:15","dtypep":"UNLINKED","origName":"cyc","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"VAR","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", "childDTypep": [ - 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{"type":"CONST","name":"?32?sh5a","addr":"(RF)","loc":"d,51:22,51:24","dtypep":"(SF)"} + {"type":"CONST","name":"?32?sh5a","addr":"(RF)","loc":"e,51:22,51:24","dtypep":"(SF)"} ]} ], "thensp": [ - {"type":"BEGIN","name":"","addr":"(TF)","loc":"d,51:26,51:31","generate":false,"genfor":false,"implied":false,"needProcess":false,"unnamed":true,"genforp": [],"stmtsp": []} + {"type":"BEGIN","name":"","addr":"(TF)","loc":"e,51:26,51:31","generate":false,"genfor":false,"implied":false,"needProcess":false,"unnamed":true,"genforp": [],"stmtsp": []} ], "elsesp": [ - {"type":"IF","name":"","addr":"(UF)","loc":"d,53:12,53:14", + {"type":"IF","name":"","addr":"(UF)","loc":"e,53:12,53:14", "condp": [ - {"type":"EQ","name":"","addr":"(VF)","loc":"d,53:20,53:22","dtypep":"(UE)", + {"type":"EQ","name":"","addr":"(VF)","loc":"e,53:20,53:22","dtypep":"(UE)", "lhsp": [ - {"type":"PARSEREF","name":"cyc","addr":"(WF)","loc":"d,53:16,53:19","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"PARSEREF","name":"cyc","addr":"(WF)","loc":"e,53:16,53:19","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ], "rhsp": [ - {"type":"CONST","name":"?32?sh63","addr":"(XF)","loc":"d,53:23,53:25","dtypep":"(SF)"} + {"type":"CONST","name":"?32?sh63","addr":"(XF)","loc":"e,53:23,53:25","dtypep":"(SF)"} ]} ], "thensp": [ - {"type":"BEGIN","name":"","addr":"(YF)","loc":"d,53:27,53:32","generate":false,"genfor":false,"implied":false,"needProcess":false,"unnamed":true,"genforp": [], + {"type":"BEGIN","name":"","addr":"(YF)","loc":"e,53:27,53:32","generate":false,"genfor":false,"implied":false,"needProcess":false,"unnamed":true,"genforp": [], "stmtsp": [ - {"type":"DISPLAY","name":"","addr":"(ZF)","loc":"d,54:10,54:16", + {"type":"DISPLAY","name":"","addr":"(ZF)","loc":"e,54:10,54:16", "fmtp": [ - {"type":"SFORMATF","name":"","addr":"(AG)","loc":"d,54:10,54:16","dtypep":"(BG)", + {"type":"SFORMATF","name":"","addr":"(AG)","loc":"e,54:10,54:16","dtypep":"(BG)", "exprsp": [ - {"type":"CONST","name":"232'h5b2530745d206379633d3d253064206372633d25782073756d3d25780a","addr":"(CG)","loc":"d,54:17,54:49","dtypep":"(DG)"}, - {"type":"TIME","name":"","addr":"(EG)","loc":"d,54:51,54:56","dtypep":"(FG)","timeunit":"NONE"}, - {"type":"PARSEREF","name":"cyc","addr":"(GG)","loc":"d,54:58,54:61","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []}, - {"type":"PARSEREF","name":"crc","addr":"(HG)","loc":"d,54:63,54:66","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []}, - {"type":"PARSEREF","name":"sum","addr":"(IG)","loc":"d,54:68,54:71","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"CONST","name":"232'h5b2530745d206379633d3d253064206372633d25782073756d3d25780a","addr":"(CG)","loc":"e,54:17,54:49","dtypep":"(DG)"}, + {"type":"TIME","name":"","addr":"(EG)","loc":"e,54:51,54:56","dtypep":"(FG)","timeunit":"NONE"}, + {"type":"PARSEREF","name":"cyc","addr":"(GG)","loc":"e,54:58,54:61","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []}, + {"type":"PARSEREF","name":"crc","addr":"(HG)","loc":"e,54:63,54:66","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []}, + {"type":"PARSEREF","name":"sum","addr":"(IG)","loc":"e,54:68,54:71","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ],"scopeNamep": []} ],"filep": []}, - {"type":"IF","name":"","addr":"(JG)","loc":"d,55:10,55:12", + {"type":"IF","name":"","addr":"(JG)","loc":"e,55:10,55:12", "condp": [ - {"type":"NEQCASE","name":"","addr":"(KG)","loc":"d,55:18,55:21","dtypep":"(UE)", + {"type":"NEQCASE","name":"","addr":"(KG)","loc":"e,55:18,55:21","dtypep":"(UE)", "lhsp": [ - {"type":"PARSEREF","name":"crc","addr":"(LG)","loc":"d,55:14,55:17","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"PARSEREF","name":"crc","addr":"(LG)","loc":"e,55:14,55:17","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ], "rhsp": [ - {"type":"CONST","name":"64'hc77bb9b3784ea091","addr":"(MG)","loc":"d,55:22,55:42","dtypep":"(AF)"} + {"type":"CONST","name":"64'hc77bb9b3784ea091","addr":"(MG)","loc":"e,55:22,55:42","dtypep":"(AF)"} ]} ], "thensp": [ - {"type":"STOP","name":"","addr":"(NG)","loc":"d,55:44,55:49","isFatal":false} + {"type":"STOP","name":"","addr":"(NG)","loc":"e,55:44,55:49","isFatal":false} ],"elsesp": []}, - {"type":"IF","name":"","addr":"(OG)","loc":"d,58:10,58:12", + {"type":"IF","name":"","addr":"(OG)","loc":"e,58:10,58:12", "condp": [ - {"type":"NEQCASE","name":"","addr":"(PG)","loc":"d,58:18,58:21","dtypep":"(UE)", + {"type":"NEQCASE","name":"","addr":"(PG)","loc":"e,58:18,58:21","dtypep":"(UE)", "lhsp": [ - {"type":"PARSEREF","name":"sum","addr":"(QG)","loc":"d,58:14,58:17","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"PARSEREF","name":"sum","addr":"(QG)","loc":"e,58:14,58:17","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ], "rhsp": [ - {"type":"CONST","name":"64'h4afe43fb79d7b71e","addr":"(RG)","loc":"d,58:22,58:42","dtypep":"(AF)"} + {"type":"CONST","name":"64'h4afe43fb79d7b71e","addr":"(RG)","loc":"e,58:22,58:42","dtypep":"(AF)"} ]} ], "thensp": [ - {"type":"STOP","name":"","addr":"(SG)","loc":"d,58:44,58:49","isFatal":false} + {"type":"STOP","name":"","addr":"(SG)","loc":"e,58:44,58:49","isFatal":false} ],"elsesp": []}, - {"type":"DISPLAY","name":"","addr":"(TG)","loc":"d,59:10,59:16", + {"type":"DISPLAY","name":"","addr":"(TG)","loc":"e,59:10,59:16", "fmtp": [ - {"type":"SFORMATF","name":"","addr":"(UG)","loc":"d,59:10,59:16","dtypep":"(BG)", + {"type":"SFORMATF","name":"","addr":"(UG)","loc":"e,59:10,59:16","dtypep":"(BG)", "exprsp": [ - {"type":"CONST","name":"168'h2a2d2a20416c6c2046696e6973686564202a2d2a0a","addr":"(VG)","loc":"d,59:17,59:41","dtypep":"(WG)"} + {"type":"CONST","name":"168'h2a2d2a20416c6c2046696e6973686564202a2d2a0a","addr":"(VG)","loc":"e,59:17,59:41","dtypep":"(WG)"} ],"scopeNamep": []} ],"filep": []}, - {"type":"FINISH","name":"","addr":"(XG)","loc":"d,60:10,60:17"} + {"type":"FINISH","name":"","addr":"(XG)","loc":"e,60:10,60:17"} ]} ],"elsesp": []} ]} @@ -431,85 +431,85 @@ ]} ]} ],"activesp": []}, - {"type":"MODULE","name":"Test","addr":"(PB)","loc":"d,66:8,66:12","origName":"Test","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [], + {"type":"MODULE","name":"Test","addr":"(PB)","loc":"e,66:8,66:12","origName":"Test","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [], "stmtsp": [ - {"type":"PORT","name":"out","addr":"(YG)","loc":"d,68:4,68:7","exprp": []}, - {"type":"PORT","name":"clk","addr":"(ZG)","loc":"d,70:4,70:7","exprp": []}, - {"type":"PORT","name":"in","addr":"(AH)","loc":"d,70:9,70:11","exprp": []}, - {"type":"VAR","name":"clk","addr":"(BH)","loc":"d,78:10,78:13","dtypep":"UNLINKED","origName":"clk","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", + {"type":"PORT","name":"out","addr":"(YG)","loc":"e,68:4,68:7","exprp": []}, + {"type":"PORT","name":"clk","addr":"(ZG)","loc":"e,70:4,70:7","exprp": []}, + {"type":"PORT","name":"in","addr":"(AH)","loc":"e,70:9,70:11","exprp": []}, + {"type":"VAR","name":"clk","addr":"(BH)","loc":"e,78:10,78:13","dtypep":"UNLINKED","origName":"clk","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", "childDTypep": [ - {"type":"BASICDTYPE","name":"LOGIC_IMPLICIT","addr":"(CH)","loc":"d,78:10,78:13","dtypep":"(CH)","keyword":"LOGIC_IMPLICIT","generic":false,"rangep": []} + {"type":"BASICDTYPE","name":"LOGIC_IMPLICIT","addr":"(CH)","loc":"e,78:10,78:13","dtypep":"(CH)","keyword":"LOGIC_IMPLICIT","generic":false,"rangep": []} ],"delayp": [],"valuep": [],"attrsp": []}, - {"type":"VAR","name":"in","addr":"(DH)","loc":"d,79:17,79:19","dtypep":"UNLINKED","origName":"in","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", + {"type":"VAR","name":"in","addr":"(DH)","loc":"e,79:17,79:19","dtypep":"UNLINKED","origName":"in","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", "childDTypep": [ - {"type":"BASICDTYPE","name":"logic","addr":"(EH)","loc":"d,79:10,79:11","dtypep":"(EH)","keyword":"logic","generic":false, + {"type":"BASICDTYPE","name":"logic","addr":"(EH)","loc":"e,79:10,79:11","dtypep":"(EH)","keyword":"logic","generic":false, "rangep": [ - {"type":"RANGE","name":"","addr":"(FH)","loc":"d,79:10,79:11","ascending":false, + {"type":"RANGE","name":"","addr":"(FH)","loc":"e,79:10,79:11","ascending":false, "leftp": [ - {"type":"CONST","name":"?32?sh1f","addr":"(GH)","loc":"d,79:11,79:13","dtypep":"(BB)"} + {"type":"CONST","name":"?32?sh1f","addr":"(GH)","loc":"e,79:11,79:13","dtypep":"(BB)"} ], "rightp": [ - {"type":"CONST","name":"?32?sh0","addr":"(HH)","loc":"d,79:14,79:15","dtypep":"(L)"} + {"type":"CONST","name":"?32?sh0","addr":"(HH)","loc":"e,79:14,79:15","dtypep":"(L)"} ]} ]} ],"delayp": [],"valuep": [],"attrsp": []}, - {"type":"VAR","name":"out","addr":"(IH)","loc":"d,80:22,80:25","dtypep":"UNLINKED","origName":"out","isSc":false,"isPrimaryIO":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", + {"type":"VAR","name":"out","addr":"(IH)","loc":"e,80:22,80:25","dtypep":"UNLINKED","origName":"out","isSc":false,"isPrimaryIO":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"PORT","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"sensIfacep":"UNLINKED", "childDTypep": [ - {"type":"BASICDTYPE","name":"logic","addr":"(JH)","loc":"d,80:11,80:14","dtypep":"(JH)","keyword":"logic","generic":false, + {"type":"BASICDTYPE","name":"logic","addr":"(JH)","loc":"e,80:11,80:14","dtypep":"(JH)","keyword":"logic","generic":false, "rangep": [ - {"type":"RANGE","name":"","addr":"(KH)","loc":"d,80:15,80:16","ascending":false, + {"type":"RANGE","name":"","addr":"(KH)","loc":"e,80:15,80:16","ascending":false, "leftp": [ - {"type":"CONST","name":"?32?sh1f","addr":"(LH)","loc":"d,80:16,80:18","dtypep":"(BB)"} + {"type":"CONST","name":"?32?sh1f","addr":"(LH)","loc":"e,80:16,80:18","dtypep":"(BB)"} ], "rightp": [ - {"type":"CONST","name":"?32?sh0","addr":"(MH)","loc":"d,80:19,80:20","dtypep":"(L)"} + {"type":"CONST","name":"?32?sh0","addr":"(MH)","loc":"e,80:19,80:20","dtypep":"(L)"} ]} ]} ],"delayp": [],"valuep": [],"attrsp": []}, - {"type":"ALWAYS","name":"","addr":"(NH)","loc":"d,82:4,82:10","keyword":"always","isSuspendable":false,"needProcess":false,"sensesp": [], + {"type":"ALWAYS","name":"","addr":"(NH)","loc":"e,82:4,82:10","keyword":"always","isSuspendable":false,"needProcess":false,"sensesp": [], "stmtsp": [ - {"type":"EVENTCONTROL","name":"","addr":"(OH)","loc":"d,82:11,82:12", + {"type":"EVENTCONTROL","name":"","addr":"(OH)","loc":"e,82:11,82:12", "sensesp": [ - {"type":"SENTREE","name":"","addr":"(PH)","loc":"d,82:11,82:12","isMulti":false, + {"type":"SENTREE","name":"","addr":"(PH)","loc":"e,82:11,82:12","isMulti":false, "sensesp": [ - {"type":"SENITEM","name":"","addr":"(QH)","loc":"d,82:13,82:20","edgeType":"POS", + {"type":"SENITEM","name":"","addr":"(QH)","loc":"e,82:13,82:20","edgeType":"POS", "sensp": [ - {"type":"PARSEREF","name":"clk","addr":"(RH)","loc":"d,82:21,82:24","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"PARSEREF","name":"clk","addr":"(RH)","loc":"e,82:21,82:24","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ],"condp": []} ]} ], "stmtsp": [ - {"type":"BEGIN","name":"","addr":"(SH)","loc":"d,82:26,82:31","generate":false,"genfor":false,"implied":false,"needProcess":false,"unnamed":true,"genforp": [], + {"type":"BEGIN","name":"","addr":"(SH)","loc":"e,82:26,82:31","generate":false,"genfor":false,"implied":false,"needProcess":false,"unnamed":true,"genforp": [], "stmtsp": [ - {"type":"ASSIGNDLY","name":"","addr":"(TH)","loc":"d,83:11,83:13","dtypep":"UNLINKED", + {"type":"ASSIGNDLY","name":"","addr":"(TH)","loc":"e,83:11,83:13","dtypep":"UNLINKED", "rhsp": [ - {"type":"PARSEREF","name":"in","addr":"(UH)","loc":"d,83:14,83:16","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"PARSEREF","name":"in","addr":"(UH)","loc":"e,83:14,83:16","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ], "lhsp": [ - {"type":"PARSEREF","name":"out","addr":"(VH)","loc":"d,83:7,83:10","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} + {"type":"PARSEREF","name":"out","addr":"(VH)","loc":"e,83:7,83:10","dtypep":"UNLINKED","expect":"TEXT","lhsp": [],"ftaskrefp": []} ],"timingControlp": []}, - {"type":"ASSERTCTL","name":"","addr":"(WH)","loc":"d,86:7,86:17","ctlType":"$assertoff", + {"type":"ASSERTCTL","name":"","addr":"(WH)","loc":"e,86:7,86:17","ctlType":"$assertoff", "controlTypep": [ - {"type":"CONST","name":"32'h4","addr":"(XH)","loc":"d,86:7,86:17","dtypep":"(MC)"} + {"type":"CONST","name":"32'h4","addr":"(XH)","loc":"e,86:7,86:17","dtypep":"(MC)"} ],"assertTypesp": [],"directiveTypesp": []}, - {"type":"ASSERTCTL","name":"","addr":"(YH)","loc":"d,87:7,87:18","ctlType":"$assertkill", + {"type":"ASSERTCTL","name":"","addr":"(YH)","loc":"e,87:7,87:18","ctlType":"$assertkill", "controlTypep": [ - {"type":"CONST","name":"32'h5","addr":"(ZH)","loc":"d,87:7,87:18","dtypep":"(MC)"} + {"type":"CONST","name":"32'h5","addr":"(ZH)","loc":"e,87:7,87:18","dtypep":"(MC)"} ],"assertTypesp": [],"directiveTypesp": []}, - {"type":"ASSERT","name":"","addr":"(AI)","loc":"d,88:7,88:13","type":"[SIMPLE_IMMEDIATE]", + {"type":"ASSERT","name":"","addr":"(AI)","loc":"e,88:7,88:13","type":"[SIMPLE_IMMEDIATE]", "propp": [ - {"type":"CONST","name":"?32?sh0","addr":"(BI)","loc":"d,88:14,88:15","dtypep":"(L)"} + {"type":"CONST","name":"?32?sh0","addr":"(BI)","loc":"e,88:14,88:15","dtypep":"(L)"} ],"sentreep": [],"failsp": [],"passsp": []}, - {"type":"ASSERTCTL","name":"","addr":"(CI)","loc":"d,89:7,89:16","ctlType":"$asserton", + {"type":"ASSERTCTL","name":"","addr":"(CI)","loc":"e,89:7,89:16","ctlType":"$asserton", "controlTypep": [ - {"type":"CONST","name":"32'h3","addr":"(DI)","loc":"d,89:7,89:16","dtypep":"(MC)"} + {"type":"CONST","name":"32'h3","addr":"(DI)","loc":"e,89:7,89:16","dtypep":"(MC)"} ],"assertTypesp": [],"directiveTypesp": []}, - {"type":"ASSERTCTL","name":"","addr":"(EI)","loc":"d,90:7,90:21","ctlType":"", + {"type":"ASSERTCTL","name":"","addr":"(EI)","loc":"e,90:7,90:21","ctlType":"", "controlTypep": [ - {"type":"CONST","name":"?32?sh3","addr":"(FI)","loc":"d,90:22,90:23","dtypep":"(QD)"} + {"type":"CONST","name":"?32?sh3","addr":"(FI)","loc":"e,90:22,90:23","dtypep":"(QD)"} ], "assertTypesp": [ - {"type":"CONST","name":"?32?sh8","addr":"(GI)","loc":"d,90:25,90:26","dtypep":"(JF)"} + {"type":"CONST","name":"?32?sh8","addr":"(GI)","loc":"e,90:25,90:26","dtypep":"(JF)"} ],"directiveTypesp": []} ]} ]} @@ -519,24 +519,24 @@ "miscsp": [ {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"(HI)", "typesp": [ - {"type":"BASICDTYPE","name":"integer","addr":"(II)","loc":"c,31:27,31:28","dtypep":"(II)","keyword":"integer","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(L)","loc":"c,33:32,33:33","dtypep":"(L)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(UE)","loc":"c,50:22,50:24","dtypep":"(UE)","keyword":"logic","generic":true,"rangep": []}, - {"type":"VOIDDTYPE","name":"","addr":"(HI)","loc":"c,51:21,51:30","dtypep":"(HI)","generic":false}, - {"type":"BASICDTYPE","name":"logic","addr":"(QD)","loc":"c,125:22,125:23","dtypep":"(QD)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(JI)","loc":"c,127:22,127:23","dtypep":"(JI)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(KI)","loc":"c,162:17,162:56","dtypep":"(KI)","keyword":"logic","range":"295:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"string","addr":"(BG)","loc":"c,162:10,162:16","dtypep":"(BG)","keyword":"string","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(Q)","loc":"d,14:9,14:11","dtypep":"(Q)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(BB)","loc":"d,18:10,18:12","dtypep":"(BB)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(MC)","loc":"d,33:26,33:31","dtypep":"(MC)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(JC)","loc":"d,33:25,33:26","dtypep":"(JC)","keyword":"logic","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(AF)","loc":"d,45:17,45:38","dtypep":"(AF)","keyword":"logic","range":"63:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(JF)","loc":"d,48:22,48:24","dtypep":"(JF)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(SF)","loc":"d,51:22,51:24","dtypep":"(SF)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(DG)","loc":"d,54:17,54:49","dtypep":"(DG)","keyword":"logic","range":"231:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"QData","addr":"(FG)","loc":"d,54:51,54:56","dtypep":"(FG)","keyword":"QData","range":"63:0","generic":true,"rangep": []}, - {"type":"BASICDTYPE","name":"logic","addr":"(WG)","loc":"d,59:17,59:41","dtypep":"(WG)","keyword":"logic","range":"167:0","generic":true,"rangep": []} + {"type":"BASICDTYPE","name":"integer","addr":"(II)","loc":"d,31:27,31:28","dtypep":"(II)","keyword":"integer","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(L)","loc":"d,33:32,33:33","dtypep":"(L)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(UE)","loc":"d,50:22,50:24","dtypep":"(UE)","keyword":"logic","generic":true,"rangep": []}, + {"type":"VOIDDTYPE","name":"","addr":"(HI)","loc":"d,51:21,51:30","dtypep":"(HI)","generic":false}, + {"type":"BASICDTYPE","name":"logic","addr":"(QD)","loc":"d,125:22,125:23","dtypep":"(QD)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(JI)","loc":"d,127:22,127:23","dtypep":"(JI)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(KI)","loc":"d,162:17,162:56","dtypep":"(KI)","keyword":"logic","range":"295:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"string","addr":"(BG)","loc":"d,162:10,162:16","dtypep":"(BG)","keyword":"string","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(Q)","loc":"e,14:9,14:11","dtypep":"(Q)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(BB)","loc":"e,18:10,18:12","dtypep":"(BB)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(MC)","loc":"e,33:26,33:31","dtypep":"(MC)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(JC)","loc":"e,33:25,33:26","dtypep":"(JC)","keyword":"logic","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(AF)","loc":"e,45:17,45:38","dtypep":"(AF)","keyword":"logic","range":"63:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(JF)","loc":"e,48:22,48:24","dtypep":"(JF)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(SF)","loc":"e,51:22,51:24","dtypep":"(SF)","keyword":"logic","range":"31:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(DG)","loc":"e,54:17,54:49","dtypep":"(DG)","keyword":"logic","range":"231:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"QData","addr":"(FG)","loc":"e,54:51,54:56","dtypep":"(FG)","keyword":"QData","range":"63:0","generic":true,"rangep": []}, + {"type":"BASICDTYPE","name":"logic","addr":"(WG)","loc":"e,59:17,59:41","dtypep":"(WG)","keyword":"logic","range":"167:0","generic":true,"rangep": []} ]}, {"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0", "modulep": [ diff --git a/test_regress/t/t_std_waiver.py b/test_regress/t/t_std_waiver.py new file mode 100755 index 000000000..c2d985114 --- /dev/null +++ b/test_regress/t/t_std_waiver.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('linter') + +test.lint() + +test.passes() diff --git a/test_regress/t/t_std_waiver.v b/test_regress/t/t_std_waiver.v new file mode 100644 index 000000000..08cf87957 --- /dev/null +++ b/test_regress/t/t_std_waiver.v @@ -0,0 +1,13 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2024 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +// Rather than look at waivers, just check we included it +`ifndef _VERILATED_STD_WAIVER_VLT_ +`error "Didn't include, no _VERILATED_STD_WAIVER_VLT_" +`endif + +module t; +endmodule diff --git a/test_regress/t/t_std_waiver_no.py b/test_regress/t/t_std_waiver_no.py new file mode 100755 index 000000000..2e67c6a6a --- /dev/null +++ b/test_regress/t/t_std_waiver_no.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('linter') + +test.lint(verilator_flags2=['-no-std-waiver']) + +test.passes() diff --git a/test_regress/t/t_std_waiver_no.v b/test_regress/t/t_std_waiver_no.v new file mode 100644 index 000000000..7cf201fb6 --- /dev/null +++ b/test_regress/t/t_std_waiver_no.v @@ -0,0 +1,13 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2024 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +// Rather than look at waivers, just check we included it +`ifdef _VERILATED_STD_WAIVER_VLT_ +`error "Shouldn't have included _VERILATED_STD_WAIVER_VLT_" +`endif + +module t; +endmodule diff --git a/test_regress/t/t_uvm_all.py b/test_regress/t/t_uvm_all.py index f6b5ecee7..ad9ecce9f 100755 --- a/test_regress/t/t_uvm_all.py +++ b/test_regress/t/t_uvm_all.py @@ -14,9 +14,6 @@ test.scenarios('vlt') test.compile( v_flags2=[ "--binary --timing +incdir+t/uvm", # - "-Wno-PKGNODECL -Wno-IMPLICITSTATIC -Wno-MISINDENT", - "-Wno-CASEINCOMPLETE -Wno-CASTCONST -Wno-SYMRSVDWORD -Wno-WIDTHEXPAND -Wno-WIDTHTRUNC", - "-Wno-REALCVT", # TODO note mostly related to $realtime - could suppress or fix upstream "--error-limit 200 --debug-exit-uvm" ], verilator_make_gmake=False) diff --git a/test_regress/t/t_uvm_todo.vlt b/test_regress/t/t_uvm_todo.vlt index 30d06a2d9..d038688e3 100644 --- a/test_regress/t/t_uvm_todo.vlt +++ b/test_regress/t/t_uvm_todo.vlt @@ -4,38 +4,4 @@ // any use, without warranty, 2024 by Wilson Snyder. // SPDX-License-Identifier: CC0-1.0 -`ifdef _T_UVM_TODO_VLT_ `else -`define _T_UVM_TODO_VLT_ - `verilator_config - -// Apply these rules to only UVM base files -`define VLT_UVM_FILES -file "*/uvm_*.svh" -contents "*UVM_VERSION_STRING*" - -// Whole-file waivers -lint_off -rule WIDTHEXPAND `VLT_UVM_FILES -lint_off -rule WIDTHTRUNC `VLT_UVM_FILES - -// Context-sensitive waivers -lint_off -rule CASEINCOMPLETE `VLT_UVM_FILES -match "* case ({is_R, is_W})*" -lint_off -rule CASEINCOMPLETE `VLT_UVM_FILES -match "* case(orig_severity)*" -lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_callback*" -lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_component*" -lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_event*" -lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_report_object*" -lint_off -rule CASTCONST `VLT_UVM_FILES -match "*class{}uvm_sequence_item*" -lint_off -rule MISINDENT `VLT_UVM_FILES -match "* foreach (abstractions[i])*" -lint_off -rule MISINDENT `VLT_UVM_FILES -match "* foreach (lock_list[i])*" -lint_off -rule MISINDENT `VLT_UVM_FILES -match "* rw_access.data=*" -lint_off -rule MISINDENT `VLT_UVM_FILES -match "* uvm_cmdline_proc =*" -lint_off -rule REALCVT `VLT_UVM_FILES -match "* m_time *" -lint_off -rule REALCVT `VLT_UVM_FILES -match "*$realtime*" -lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'delete'*" -lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'list'*" -lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'map'*" -lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'override'*" -lint_off -rule SYMRSVDWORD `VLT_UVM_FILES -match "*'volatile'*" - -`undef VLT_UVM_FILES - -`endif // Guard