Tests: Test some warnings without tests.

bin/verilator

@@ -4795,12 +4795,12 @@ correctly.
 
 =item TASKNSVAR
 
-Error when a call to a task or function has a output from that task tied to
+Error when a call to a task or function has an inout from that task tied to
 a non-simple signal.  Instead connect the task output to a temporary signal
 of the appropriate width, and use that signal to set the appropriate
 expression as the next statement.  For example:
 
-      task foo; output sig; ... endtask
+      task foo(inout sig); ... endtask
       always @* begin
            foo(bus_we_select_from[2]);  // Will get TASKNSVAR error
       end

test_regress/t/t_func_impure_bad.out

@@ -0,0 +1,7 @@
+%Error-IMPURE: t/t_func_impure_bad.v:11:9: Unsupported: External variable referenced by non-inlined function/task: 't.foo'
+   11 |    task foo;
+      |         ^~~
+               t/t_func_impure_bad.v:13:7: ... Location of the external reference: 't.sig'
+   13 |       sig = '1;
+      |       ^~~
+%Error: Exiting due to

test_regress/t/t_func_impure_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_func_impure_bad.v

@@ -0,0 +1,20 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   int sig;
+
+   task foo;
+      // verilator no_inline_task
+      sig = '1;
+   endtask
+
+   initial begin
+      foo();
+   end
+
+endmodule

test_regress/t/t_func_tasknsvar_bad.out

@@ -0,0 +1,7 @@
+%Error-TASKNSVAR: t/t_func_tasknsvar_bad.v:16:29: Unsupported: Function/task input argument is not simple variable
+   16 |       foo(bus_we_select_from[2]);   
+      |                             ^
+%Error: Internal Error: t/t_func_tasknsvar_bad.v:10:7: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): m_varScopep && !m_varScopep->brokeExists()
+   10 |       sig = '1;
+      |       ^~~
+                        ... See the manual and https://verilator.org for more assistance.

test_regress/t/t_func_tasknsvar_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_func_tasknsvar_bad.v

@@ -0,0 +1,19 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   task foo(inout sig);
+      sig = '1;
+   endtask
+
+   reg [3:0] bus_we_select_from;
+
+   initial begin
+      foo(bus_we_select_from[2]);  // Will get TASKNSVAR error
+   end
+
+endmodule

test_regress/t/t_lint_caseincomplete_bad.out

@@ -0,0 +1,5 @@
+%Warning-CASEINCOMPLETE: t/t_lint_caseincomplete_bad.v:15:7: Case values incompletely covered (example pattern 0x1)
+   15 |       case (i)
+      |       ^~~~
+                         ... Use "/* verilator lint_off CASEINCOMPLETE */" and lint_on around source to disable this message.
+%Error: Exiting due to

test_regress/t/t_lint_caseincomplete_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_lint_caseincomplete_bad.v

@@ -0,0 +1,21 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Inputs
+   i
+   );
+
+   input [1:0] i;
+
+   always_comb begin
+      case (i)
+        2'b00: ;
+        2'b10: ;
+        2'b11: ;
+      endcase
+   end
+endmodule

test_regress/t/t_lint_cmpconst_bad.out

@@ -0,0 +1,6 @@
+%Warning-CMPCONST: t/t_lint_cmpconst_bad.v:13:15: Comparison is constant due to limited range
+                                                : ... In instance t
+   13 |       if (uns > 3'b111) $stop;
+      |               ^
+                   ... Use "/* verilator lint_off CMPCONST */" and lint_on around source to disable this message.
+%Error: Exiting due to

test_regress/t/t_lint_cmpconst_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_lint_cmpconst_bad.v

@@ -0,0 +1,15 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   bit [2:0] uns;
+
+   initial begin
+      uns = 1;
+      if (uns > 3'b111) $stop;
+   end
+endmodule

test_regress/t/t_lint_unsigned_bad.out

@@ -0,0 +1,6 @@
+%Warning-UNSIGNED: t/t_lint_unsigned_bad.v:13:15: Comparison is constant due to unsigned arithmetic
+                                                : ... In instance t
+   13 |       if (uns < 0) $stop;
+      |               ^
+                   ... Use "/* verilator lint_off UNSIGNED */" and lint_on around source to disable this message.
+%Error: Exiting due to

test_regress/t/t_lint_unsigned_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_lint_unsigned_bad.v

@@ -0,0 +1,15 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   bit [2:0] uns;
+
+   initial begin
+      uns = 1;
+      if (uns < 0) $stop;
+   end
+endmodule

test_regress/t/t_order_blkandnblk_bad.out

@@ -0,0 +1,4 @@
+%Error-BLKANDNBLK: t/t_order_blkandnblk_bad.v:17:21: Unsupported: Blocked and non-blocking assignments to same variable: 't.array'
+   17 |    logic [1:0][3:0] array;
+      |                     ^~~~~
+%Error: Exiting due to

test_regress/t/t_order_blkandnblk_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_order_blkandnblk_bad.v

@@ -0,0 +1,26 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Outputs
+   o,
+   // Inputs
+   clk, i
+   );
+   input clk;
+   input [3:0] i;
+   output [3:0] o;
+
+   logic [1:0][3:0] array;
+
+   always_comb array[0] = i;
+
+   always @ (posedge clk)
+     array[1] <= array[0];
+
+   assign o = array[1];
+
+endmodule

test_regress/t/t_order_blkloopinit_bad.out

@@ -0,0 +1,4 @@
+%Error-BLKLOOPINIT: t/t_order_blkloopinit_bad.v:21:19: Unsupported: Delayed assignment to array inside for loops (non-delayed is ok - see docs)
+   21 |          array[i] <= 0;   
+      |                   ^~
+%Error: Exiting due to

test_regress/t/t_order_blkloopinit_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_order_blkloopinit_bad.v

@@ -0,0 +1,26 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Outputs
+   o,
+   // Inputs
+   clk
+   );
+   input clk;
+   output int o;
+
+   localparam SIZE = 65536;
+   int array [SIZE];
+
+   always @ (posedge clk) begin
+      for (int i=0; i<SIZE; i++) begin
+         array[i] <= 0;  // BLKLOOPINIT
+      end
+      o <= array[1];
+   end
+
+endmodule