git-svn-id: file://localhost/svn/verilator/trunk/verilator@824 77ca24e4-aefa-0310-84f0-b9a241c72d87
This commit is contained in:
Wilson Snyder 2006-10-18 13:54:36 +00:00
parent 6e16bc1b7b
commit 3b5c791332

View File

@ -13,7 +13,7 @@ compile (
fails=>$Last_Self->{v3},
verilator_flags=> [qw(-sp -Werror-WIDTH)],
expect=>
'%Error: t/t_flag_werror.v:\d+: Operator ASSIGNW expects 4 bits on the Assign RHS, but Assign RHS.s CONST generates 6 bits.
'%Error-WIDTH: t/t_flag_werror.v:\d+: Operator ASSIGNW expects 4 bits on the Assign RHS, but Assign RHS.s CONST generates 6 bits.
%Error: Exiting due to',
) if $Last_Self->{v3};