Tests: Cover some previously uncovered warnings

src/V3Config.cpp

@@ -564,7 +564,7 @@ void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftas
     } else {
         if (attr == VAttrType::VAR_FORCEABLE) {
             if (module.empty()) {
-                fl->v3error("missing -module");
+                fl->v3error("forceable missing -module");
             } else if (!ftask.empty()) {
                 fl->v3error("Signals inside functions/tasks cannot be marked forceable");
             } else {

src/V3LinkCells.cpp

@@ -355,7 +355,7 @@ private:
         for (AstPin *nextp, *pinp = nodep->pinsp(); pinp; pinp = nextp) {
             nextp = VN_AS(pinp->nextp(), Pin);
             if (pinp->dotStar()) {
-                if (pinStar) pinp->v3error("Duplicate .* in an instance");
+                if (pinStar) pinp->v3error("Duplicate .* in an instance (IEEE 1800-2017 23.3.2)");
                 pinStar = true;
                 // Done with this fake pin
                 VL_DO_DANGLING(pinp->unlinkFrBack()->deleteTree(), pinp);
@@ -374,8 +374,10 @@ private:
             // Note what pins exist
             std::unordered_set<string> ports;  // Symbol table of all connected port names
             for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
-                if (pinp->name() == "")
-                    pinp->v3error("Connect by position is illegal in .* connected instances");
+                if (pinStar && pinp->name().substr(0, 11) == "__pinNumber") {
+                    pinp->v3error("Connect by position is illegal in .* connected instances"
+                                  " (IEEE 1800-2017 23.3.2)");
+                }
                 if (!pinp->exprp()) {
                     if (pinp->name().substr(0, 11) == "__pinNumber") {
                         pinp->v3warn(PINNOCONNECT,

src/V3Number.cpp

@@ -269,7 +269,8 @@ void V3Number::create(const char* sourcep) {
             }
             case '_': break;
             default: {
-                v3error("Illegal character in decimal constant: " << *cp);
+                // Likely impossible as parser prevents hitting it
+                v3error("Illegal character in decimal constant: " << *cp);  // LCOV_EXCL_LINE
                 break;
             }
             }
@@ -346,11 +347,17 @@ void V3Number::create(const char* sourcep) {
                 case 'x': setBit(obit++,'x'); setBit(obit++,'x'); setBit(obit++,'x'); setBit(obit++,'x'); break;
                     // clang-format on
                 case '_': break;
-                default: v3error("Illegal character in hex constant: " << *cp);
+                default:
+                    // Likely impossible as parser prevents hitting it
+                    v3error("Illegal character in hex constant: " << *cp);  // LCOV_EXCL_LINE
+                    break;
                 }
                 break;
             }
-            default: v3error("Illegal base character: " << base);
+            default:
+                // Likely impossible as parser prevents hitting it
+                v3error("Illegal base character: " << base);  // LCOV_EXCL_LINE
+                break;
             }
         }
     }

src/V3Options.cpp

@@ -1594,14 +1594,8 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
             ++i;
             int val = 0;
             if (i < argc && isdigit(argv[i][0])) {
-                val = atoi(argv[i]);
-                if (val < 0) {
-                    fl->v3error("-j requires a non-negative integer argument, but '"
-                                << argv[i] << "' was passed");
-                    val = 1;  // Fall-back value, though we will exit on error.
-                } else if (val == 0) {
-                    val = std::thread::hardware_concurrency();
-                }
+                val = atoi(argv[i]);  // Can't be negative due to isdigit above
+                if (val == 0) val = std::thread::hardware_concurrency();
                 ++i;
             }
             if (m_buildJobs == -1) m_buildJobs = val;

src/V3ParseGrammar.cpp

@@ -184,7 +184,8 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
         }
     }
     if (type == VVarType::GENVAR) {
-        if (arrayp) fileline->v3error("Genvars may not be arrayed: " << name);
+        // Should be impossible as the grammer blocks this, but...
+        if (arrayp) fileline->v3error("Genvars may not be arrayed: " << name);  // LCOV_EXCL_LINE
     }
 
     // Split RANGE0-RANGE1-RANGE2 into

src/V3Width.cpp

@@ -5382,7 +5382,13 @@ private:
             userIterateAndNext(nodep->lhsp(), WidthVP(CONTEXT, PRELIM).p());
             userIterateAndNext(nodep->rhsp(), WidthVP(CONTEXT, PRELIM).p());
             if (nodep->lhsp()->isDouble() || nodep->rhsp()->isDouble()) {
-                if (!realok) nodep->v3error("Real not allowed as operand to in ?== operator");
+                if (!realok) {
+                    nodep->v3error("Real is illegal operand to ?== operator");
+                    AstNode* const newp = new AstConst{nodep->fileline(), AstConst::BitFalse{}};
+                    nodep->replaceWith(newp);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                    return;
+                }
                 if (AstNodeBiop* const newp = replaceWithDVersion(nodep)) {
                     VL_DANGLING(nodep);
                     nodep = newp;  // Process new node instead

test_regress/t/t_display_cwide_bad.out

@@ -0,0 +1,6 @@
+%Warning-WIDTH: t/t_display_cwide_bad.v:10:7: $display-like format of %c format of > 8 bit value
+   10 |       $display("%c", 32'h1234);   
+      |       ^~~~~~~~
+                ... For warning description see https://verilator.org/warn/WIDTH?v=latest
+                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
+%Error: Exiting due to

test_regress/t/t_display_cwide_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_display_cwide_bad.v

@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2003 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   initial begin
+      // Display formatting
+      $display("%c", 32'h1234);  // Bad wide %c
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

test_regress/t/t_dist_warn_coverage.pl

@@ -26,15 +26,10 @@ foreach my $s (
     # Not yet analyzed
     ' is not an in/out/inout/param/interface: ',
     ' loading non-variable',
-    '$display-like format of %c format of > 8 bit value',
     '$fopen mode should be <= 4 characters',
     '\'foreach\' loop variable expects simple variable name',
     '--coverage and --savable not supported together',
-    '--output-split-cfuncs must be >= 0: ',
-    '--output-split-ctrace must be >= 0: ',
     '--pipe-filter protocol error, unexpected: ',
-    '--reloop-limit must be >= 2: ',
-    '-j requires a non-negative integer argument, but \'',
     '/*verilator sformat*/ can only be applied to last argument of ',
     'Argument needed for string.',
     'Array initialization has too few elements, need element ',
@@ -45,13 +40,11 @@ foreach my $s (
     'Assignment pattern with too many elements',
     'Attempted parameter setting of non-parameter: Param ',
     'Attempting to extend using a non-class ',
-    'BASE64 line too long in `pragma protect key_bloock/data_block',
     'Can\'t find varpin scope of ',
     'Can\'t resolve module reference: \'',
     'Cannot mix DPI import, DPI export, class methods, and/or public ',
     'Cannot write preprocessor output: ',
     'Circular logic when ordering code (non-cutable edge loop)',
-    'Connect by position is illegal in .* connected instances',
     'Deferred assertions must use \'#0\' (IEEE 1800-2017 16.4)',
     'Define or directive not defined: `',
     'Duplicate declaration of member name: ',
@@ -62,12 +55,8 @@ foreach my $s (
     'Extern declaration\'s scope is not a defined class',
     'Format to $display-like function must have constant format string',
     'Forward typedef used as class/package does not resolve to class/package: ',
-    'Genvars may not be arrayed: ',
     'Illegal +: or -: select; type already selected, or bad dimension: ',
-    'Illegal base character: ',
     'Illegal bit or array select; type already selected, or bad dimension: ',
-    'Illegal character in decimal constant: ',
-    'Illegal character in hex constant: ',
     'Illegal range select; type already selected, or bad dimension: ',
     'In defparam, instance ',
     'Interface port ',
@@ -84,9 +73,6 @@ foreach my $s (
     'Parameter type pin value isn\'t a type: Param ',
     'Parameter type variable isn\'t a type: Param ',
     'Pattern replication value of 0 is not legal.',
-    'Real not allowed as operand to in ?== operator',
-    'Replication value isn\'t a constant.',
-    'Replication value of 0 is only legal under a concatenation (IEEE ',
     'Return with return value isn\'t underneath a function',
     'Select from non-array ',
     'Signals inside functions/tasks cannot be marked forceable',
@@ -138,7 +124,6 @@ foreach my $s (
     'Unsupported: modport export',
     'Unsupported: static cast to ',
     'Unsupported: super',
-    'Unterminated /* comment inside -f file.',
     'Width of :+ or :- is < 0: ',
     'Width of :+ or :- is huge; vector of over 1billion bits: ',
     'Width of bit extract isn\'t a constant',
@@ -146,11 +131,8 @@ foreach my $s (
     'dynamic new() not expected in this context (data type must be dynamic array)',
     'dynamic new() not expected in this context (expected under an assign)',
     'line_length must be multiple of 4 for BASE64',
-    'missing -module',
-    'missing -var',
     'new() not expected in this context',
     'no_inline not supported for tasks',
-    'of %c format of > 8 bit value',
     ) { $Suppressed{$s} = 1; }
 
 if (!-r "$root/.git") {
@@ -258,3 +240,7 @@ sub read_outputs {
     }
     print "Number of outputs = ",scalar(keys %Outputs), "\n";
 }
+
+# Local Variables:
+# compile-command:"./t_dist_warn_coverage.pl"
+# End:

test_regress/t/t_flag_f_bad_cmt.out

@@ -0,0 +1,2 @@
+%Error: Unterminated /* comment inside -f file.
+%Error: Exiting due to

test_regress/t/t_flag_f_bad_cmt.pl

@@ -0,0 +1,20 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2008 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    v_flags2 => ["-f t/t_flag_f_bad_cmt.vc"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_flag_f_bad_cmt.v

@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: Verilog Test module
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`include "t_flag_f_tsub_inc.v"
+
+module t;
+   initial begin
+`ifndef GOT_DEF1
+      $write("%%Error: NO GOT_DEF1\n"); $stop;
+`endif
+`ifndef GOT_DEF2
+      $write("%%Error: NO GOT_DEF2\n"); $stop;
+`endif
+`ifndef GOT_DEF3
+      $write("%%Error: NO GOT_DEF3\n"); $stop;
+`endif
+`ifndef GOT_DEF4
+      $write("%%Error: NO GOT_DEF4\n"); $stop;
+`endif
+`ifndef GOT_DEF5
+      $write("%%Error: NO GOT_DEF5\n"); $stop;
+`endif
+`ifndef GOT_DEF6
+      $write("%%Error: NO GOT_DEF6\n"); $stop;
+`endif
+`ifdef NON_DEF
+      $write("%%Error: NON_DEF\n"); $stop;
+`endif
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

test_regress/t/t_flag_f_bad_cmt.vc

@@ -0,0 +1 @@
+/* Multiline unterminated comment

test_regress/t/t_flag_values_bad.out

@@ -0,0 +1,4 @@
+%Error: --output-split-cfuncs must be >= 0: -1
+%Error: --output-split-ctrace must be >= 0: -1
+%Error: --reloop-limit must be >= 2: -1
+%Error: Exiting due to

test_regress/t/t_flag_values_bad.pl

@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    verilator_flags2 => ["--output-split-cfuncs -1",
+                         "--output-split-ctrace -1",
+                         "--reloop-limit -1",],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_inst_2star_bad.out

@@ -1,4 +1,7 @@
-%Error: t/t_inst_2star_bad.v:9:17: Duplicate .* in an instance
-    9 |    sub sub (.*, .*);
+%Error: t/t_inst_2star_bad.v:11:17: Duplicate .* in an instance (IEEE 1800-2017 23.3.2)
+   11 |    sub sub (.*, .*);
       |                 ^~
+%Error: t/t_inst_2star_bad.v:13:13: Connect by position is illegal in .* connected instances (IEEE 1800-2017 23.3.2)
+   13 |    sub sub (foo, .*);
+      |             ^~~
 %Error: Exiting due to

test_regress/t/t_inst_2star_bad.v

@@ -6,8 +6,12 @@
 
 module t (/*AUTOARG*/);
 
+   wire foo;
+
    sub sub (.*, .*);
 
+   sub sub (foo, .*);
+
 endmodule
 
 module sub (input foo);

test_regress/t/t_lint_pragma_protected_bad.out

@@ -1,41 +1,44 @@
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:8:17: Unknown '`pragma protect' error
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:8:17: Unknown '`pragma protect' error
     8 | `pragma protect encrypt_agent=123
       |                 ^~~~~~~~~~~~~~~~~
                      ... For error description see https://verilator.org/warn/BADSTDPRAGMA?v=latest
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:10:17: Unknown '`pragma protect' error
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:10:17: Unknown '`pragma protect' error
    10 | `pragma protect encrypt_agent_info
       |                 ^~~~~~~~~~~~~~~~~~
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:23:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:27:17: multiple `pragma protected encoding sections
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:23:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:27:17: multiple `pragma protected encoding sections
    27 | `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-%Warning-PROTECTED: t/t_lint_pragma_protected_err.v:44:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
+%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:44:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
                     ... Use "/* verilator lint_off PROTECTED */" and lint_on around source to disable this message.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:51:17: Illegal encoding type for `pragma protected encoding
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:51:17: Illegal encoding type for `pragma protected encoding
    51 | `pragma protect encoding = (enctype = "A-bad-not-BASE64", line_length = 1, bytes = 295)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_pragma_protected_err.v:51:17: Unsupported: only BASE64 is recognized for `pragma protected encoding
+%Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:51:17: Unsupported: only BASE64 is recognized for `pragma protected encoding
    51 | `pragma protect encoding = (enctype = "A-bad-not-BASE64", line_length = 1, bytes = 295)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-%Warning-PROTECTED: t/t_lint_pragma_protected_err.v:53:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:54:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:53:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:54:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
    54 | c2lvbiAzIG9mIHRoZSBHTlUgTGVzc2VyCkdlbmVyYWwgUHVibGljIExpY2Vuc2UsIGFuZCB0aGUg
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:55:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:55:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
    55 | IkdOVSBHUEwiIHJlZmVycyB0byB2ZXJzaW9uIDMgb2YgdGhlIEdOVQpHZW5lcmFsIFB1YmxpYyBM
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:56:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:56:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
    56 | aWNlbnNlLgoKICAiVGhlIExpYnJhcnkiIHJlZmVycyB0byBhIGNvdmVyZWQgd29yayBnb3Zlcm5l
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:57:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:57:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
    57 | ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:58:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:58:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
    58 | ZCBXb3JrIGFzIG==
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:59:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:59:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_err.v:67:1: `pragma is missing a pragma_expression.
-   67 | `pragma
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:59:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:59:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:63:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 line too long in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:1: `pragma is missing a pragma_expression.
+   72 | `pragma
       | ^~~~~~~
 %Error: Exiting due to

test_regress/t/t_lint_pragma_protected_bad.v

@@ -58,6 +58,11 @@ ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l
 ZCBXb3JrIGFzIG==
 
 
+`pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 76)
+`pragma protect data_block
+aW5pdGlvbnMuCgogIEFzIHVzZWQgaGVyZWluLCAidGhpcyBMaWNlbnNlIiByZWZlcnMgdG8gdmVyTOOLONG
+
+
 `pragma protect end_protected
 
 // Should trigger unknown pragma warning, although in principle unknown pragmas should be safely ignored.

test_regress/t/t_math_eq_bad.out

@@ -0,0 +1,5 @@
+%Error: t/t_math_eq_bad.v:13:13: Real is illegal operand to ?== operator
+                               : ... In instance t
+   13 |       if (a ==? 1.0) $stop;   
+      |             ^~~
+%Error: Exiting due to

test_regress/t/t_math_eq_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2010 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    expect_filename => $Self->{golden_filename},
+    fails => 1,
+    );
+
+ok(1);
+1;

test_regress/t/t_math_eq_bad.v

@@ -0,0 +1,16 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2022 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   logic [31:0] a;
+
+   initial begin
+      a = 1234;
+      if (a ==? 1.0) $stop;  // Bad
+   end
+
+endmodule

test_regress/t/t_math_repl_bad.out

@@ -0,0 +1,22 @@
+%Error: t/t_math_repl_bad.v:12:14: Replication value of 0 is only legal under a concatenation (IEEE 1800-2017 11.4.12.1)
+                                 : ... In instance t
+   12 |       o = {0 {1'b1}};   
+      |              ^
+%Warning-WIDTH: t/t_math_repl_bad.v:12:9: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's REPLICATE generates 1 bits.
+                                        : ... In instance t
+   12 |       o = {0 {1'b1}};   
+      |         ^
+                ... For warning description see https://verilator.org/warn/WIDTH?v=latest
+                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.
+%Error: t/t_math_repl_bad.v:13:12: Expecting expression to be constant, but can't convert a TESTPLUSARGS to constant.
+                                 : ... In instance t
+   13 |       o = {$test$plusargs("NON-CONSTANT") {1'b1}};   
+      |            ^~~~~~~~~~~~~~
+%Error: t/t_math_repl_bad.v:13:43: Replication value isn't a constant.
+                                 : ... In instance t
+   13 |       o = {$test$plusargs("NON-CONSTANT") {1'b1}};   
+      |                                           ^
+%Error: Internal Error: t/t_math_repl_bad.v:13:9: ../V3Width.cpp:#: Node has no type
+                                                : ... In instance t
+   13 |       o = {$test$plusargs("NON-CONSTANT") {1'b1}};   
+      |         ^

test_regress/t/t_math_repl_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2010 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_math_repl_bad.v

@@ -0,0 +1,16 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2022 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   logic [31:0] o;
+
+   initial begin
+      o = {0 {1'b1}};  // Bad 0 rep
+      o = {$test$plusargs("NON-CONSTANT") {1'b1}};  // Bad non-constant rep
+      $stop;
+   end
+endmodule

test_regress/t/t_vlt_syntax_bad.out

@@ -19,4 +19,10 @@
 %Error: t/t_vlt_syntax_bad.vlt:18:1: Argument -scope only supported for tracing_on/off_off
    18 | lint_on --rule UNOPTFLAT -scope "top*" -levels 0
       | ^~~~~~~
+%Error: t/t_vlt_syntax_bad.vlt:20:1: forceable missing -module
+   20 | forceable -module "" -var "net_*"
+      | ^~~~~~~~~
+%Error: t/t_vlt_syntax_bad.vlt:22:1: missing -var
+   22 | forceable -module "top" -var ""
+      | ^~~~~~~~~
 %Error: Exiting due to

test_regress/t/t_vlt_syntax_bad.vlt

@@ -16,3 +16,7 @@ lint_off --rule UNOPTFLAT -scope "top*"
 lint_off --rule UNOPTFLAT -scope "top*" -levels 0
 lint_on --rule UNOPTFLAT -scope "top*"
 lint_on --rule UNOPTFLAT -scope "top*" -levels 0
+// bad, --module missing
+forceable -module "" -var "net_*"
+// bad, --var missing
+forceable -module "top" -var ""