From 34424e70d8aa9f771643e7fbc962284d7f4fbdd8 Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Wed, 5 Jun 2019 20:39:42 -0400 Subject: [PATCH] Fix sameHash error on type parameters, bug1456. Signed-off-by: Wilson Snyder --- Changes | 2 ++ src/V3AstNodes.h | 1 + test_regress/t/t_real_param.v | 2 -- test_regress/t/t_type_param.pl | 20 +++++++++++++++ test_regress/t/t_type_param.v | 45 ++++++++++++++++++++++++++++++++++ 5 files changed, 68 insertions(+), 2 deletions(-) create mode 100755 test_regress/t/t_type_param.pl create mode 100644 test_regress/t/t_type_param.v diff --git a/Changes b/Changes index a423786f9..daa56d6e4 100644 --- a/Changes +++ b/Changes @@ -30,6 +30,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix performance when mulithreaded on 1 CPU, bug1455. [Stefan Wallentowitz] +**** Fix sameHash error on type parameters, bug1456. [Todd Strader] + * Verilator 4.014 2019-05-08 diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 66be9206b..4a0566849 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -3580,6 +3580,7 @@ public: AstNode* fromp() const { return op1p(); } AstNode* dimp() const { return op2p(); } AstAttrType attrType() const { return m_attrType; } + virtual V3Hash sameHash() const { return V3Hash(m_attrType); } virtual void dump(std::ostream& str=std::cout); }; diff --git a/test_regress/t/t_real_param.v b/test_regress/t/t_real_param.v index cc131e7a9..99b07ac94 100644 --- a/test_regress/t/t_real_param.v +++ b/test_regress/t/t_real_param.v @@ -15,8 +15,6 @@ module t(); for (r = 0; r <= 1; r++) begin : gen_r localparam real lparam = m + (r + 0.5); initial begin - $display("%m lparam = %f foo bar = %f", // TODO -- remove - lparam, foo_inst.bar); if (lparam != foo_inst.bar) begin $display("%m: lparam != foo_inst.bar (%f, %f)", lparam, foo_inst.bar); diff --git a/test_regress/t/t_type_param.pl b/test_regress/t/t_type_param.pl new file mode 100755 index 000000000..b78f33caa --- /dev/null +++ b/test_regress/t/t_type_param.pl @@ -0,0 +1,20 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2019 by Todd Strader. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_type_param.v b/test_regress/t/t_type_param.v new file mode 100644 index 000000000..7b56d596c --- /dev/null +++ b/test_regress/t/t_type_param.v @@ -0,0 +1,45 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Todd Strader. + +module foo + #( parameter type bar = logic) + (); + + localparam baz = $bits(bar); +endmodule + +module t(); + logic [7:0] qux; + + foo #(.bar (logic [ $bits(qux) - 1 : 0])) foo_inst (); +// initial begin +// if ($bits(qux) != $bits(foo_inst.baz)) begin +// $display("%m: m != bits of foo_inst.baz (%0d, %0d)", +// $bits(qux), $bits(foo_inst.baz)); +// $stop(); +// end +// end + + genvar m; + generate + for (m = 1; m <= 8; m+=1) begin : gen_m +// initial begin +// if (m != $bits(foo_inst.baz)) begin +// $display("%m: m != bits of foo_inst.baz (%0d, %0d)", +// m, $bits(foo_inst.baz)); +// $stop(); +// end +// end + + foo #(.bar (logic[m-1:0])) foo_inst (); + end + endgenerate + + initial begin + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule