diff --git a/ci/docker/buildenv/README.rst b/ci/docker/buildenv/README.rst index 3ff025fc9..e131917ac 100644 --- a/ci/docker/buildenv/README.rst +++ b/ci/docker/buildenv/README.rst @@ -1,3 +1,6 @@ +.. Copyright 2003-2023 by Wilson Snyder. +.. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + Verilator Build Docker Container ================================ diff --git a/ci/docker/run/README.rst b/ci/docker/run/README.rst index dd778f4fb..db9d0de1d 100644 --- a/ci/docker/run/README.rst +++ b/ci/docker/run/README.rst @@ -1,3 +1,6 @@ +.. Copyright 2003-2023 by Wilson Snyder. +.. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + Verilator Executable Docker Container ===================================== diff --git a/docs/guide/conf.py b/docs/guide/conf.py index a10484a35..bcf574cc7 100644 --- a/docs/guide/conf.py +++ b/docs/guide/conf.py @@ -1,6 +1,7 @@ # pylint: disable=C0103,C0114,C0116,C0301,E0402,W0622 # # Configuration file for Verilator's Sphinx documentation builder. +# Copyright 2003-2023 by Wilson Snyder. # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # # This file only contains overridden options. For a full list: diff --git a/docs/internals.rst b/docs/internals.rst index 7e96fa7bd..879157008 100644 --- a/docs/internals.rst +++ b/docs/internals.rst @@ -1876,4 +1876,6 @@ Copyright 2008-2023 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. +SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + .. |Logo| image:: https://www.veripool.org/img/verilator_256_200_min.png diff --git a/docs/verilated.dox b/docs/verilated.dox index 67841f4b1..85d1ef529 100644 --- a/docs/verilated.dox +++ b/docs/verilated.dox @@ -1,4 +1,4 @@ -PROJECT_NAME = "Verilog to Routing - ABC" +PROJECT_NAME = "Verilator" INPUT = ../../include OUTPUT_DIRECTORY = _build/doxygen/verilated diff --git a/docs/xml.rst b/docs/xml.rst index 83b537477..9d18a93d1 100644 --- a/docs/xml.rst +++ b/docs/xml.rst @@ -74,4 +74,6 @@ Copyright 2020-2023 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. +SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + .. |Logo| image:: https://www.veripool.org/img/verilator_256_200_min.png diff --git a/src/V3HierBlock.h b/src/V3HierBlock.h index aca3ca9ef..02842a62d 100644 --- a/src/V3HierBlock.h +++ b/src/V3HierBlock.h @@ -6,15 +6,11 @@ // //************************************************************************* // -// Copyright 2003-2023 by Wilson Snyder. This program is free software; you can -// redistribute it and/or modify it under the terms of either the GNU +// Copyright 2003-2023 by Wilson Snyder. This program is free software; you +// can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. -// -// Verilator is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. +// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 // //************************************************************************* diff --git a/test_regress/t/t_array_index_increment.pl b/test_regress/t/t_array_index_increment.pl index 89a4e77d9..beaa2ca59 100755 --- a/test_regress/t/t_array_index_increment.pl +++ b/test_regress/t/t_array_index_increment.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(simulator => 1); diff --git a/test_regress/t/t_array_index_increment.v b/test_regress/t/t_array_index_increment.v index 67732b596..8d89223fa 100644 --- a/test_regress/t/t_array_index_increment.v +++ b/test_regress/t/t_array_index_increment.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t (/*AUTOARG*/ // Inputs clk diff --git a/test_regress/t/t_array_query_with.pl b/test_regress/t/t_array_query_with.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_array_query_with.pl +++ b/test_regress/t/t_array_query_with.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_assert_clock_event_unsup.pl b/test_regress/t/t_assert_clock_event_unsup.pl index f201521f0..d188a4276 100755 --- a/test_regress/t/t_assert_clock_event_unsup.pl +++ b/test_regress/t/t_assert_clock_event_unsup.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -11,8 +11,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(vlt => 1); compile( - expect_filename=>$Self->{golden_filename}, - verilator_flags2=> ['--assert'], + expect_filename => $Self->{golden_filename}, + verilator_flags2 => ['--assert'], fails => 1, ); diff --git a/test_regress/t/t_assert_disable_bad.pl b/test_regress/t/t_assert_disable_bad.pl index f201521f0..efe818bd1 100755 --- a/test_regress/t/t_assert_disable_bad.pl +++ b/test_regress/t/t_assert_disable_bad.pl @@ -11,8 +11,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(vlt => 1); compile( - expect_filename=>$Self->{golden_filename}, - verilator_flags2=> ['--assert'], + expect_filename => $Self->{golden_filename}, + verilator_flags2 => ['--assert'], fails => 1, ); diff --git a/test_regress/t/t_assert_named_property.pl b/test_regress/t/t_assert_named_property.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_assert_named_property.pl +++ b/test_regress/t/t_assert_named_property.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_assert_past.pl b/test_regress/t/t_assert_past.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_assert_past.pl +++ b/test_regress/t/t_assert_past.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_assert_property_untyped.pl b/test_regress/t/t_assert_property_untyped.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_assert_property_untyped.pl +++ b/test_regress/t/t_assert_property_untyped.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_assert_property_untyped_unsup.pl b/test_regress/t/t_assert_property_untyped_unsup.pl index f201521f0..d188a4276 100755 --- a/test_regress/t/t_assert_property_untyped_unsup.pl +++ b/test_regress/t/t_assert_property_untyped_unsup.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -11,8 +11,8 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(vlt => 1); compile( - expect_filename=>$Self->{golden_filename}, - verilator_flags2=> ['--assert'], + expect_filename => $Self->{golden_filename}, + verilator_flags2 => ['--assert'], fails => 1, ); diff --git a/test_regress/t/t_assert_recursive_property_unsup.pl b/test_regress/t/t_assert_recursive_property_unsup.pl index f201521f0..15b4f4a73 100755 --- a/test_regress/t/t_assert_recursive_property_unsup.pl +++ b/test_regress/t/t_assert_recursive_property_unsup.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_assert_sampled.pl b/test_regress/t/t_assert_sampled.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_assert_sampled.pl +++ b/test_regress/t/t_assert_sampled.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_bigmem_bad.pl b/test_regress/t/t_bigmem_bad.pl index 8e592a491..66a4e492d 100755 --- a/test_regress/t/t_bigmem_bad.pl +++ b/test_regress/t/t_bigmem_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2021 by filamoon. This program is free software; you can +# Copyright 2021 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_case_incrdecr.v b/test_regress/t/t_case_incrdecr.v index 4b3e6e2fc..fe415616e 100644 --- a/test_regress/t/t_case_incrdecr.v +++ b/test_regress/t/t_case_incrdecr.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2022 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t (/*AUTOARG*/ // Inputs diff --git a/test_regress/t/t_class_assign_bad.pl b/test_regress/t/t_class_assign_bad.pl index b59a5c675..430290c0a 100755 --- a/test_regress/t/t_class_assign_bad.pl +++ b/test_regress/t/t_class_assign_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_class_fwd_cc.pl b/test_regress/t/t_class_fwd_cc.pl index 7314796b8..aca1cb3c1 100755 --- a/test_regress/t/t_class_fwd_cc.pl +++ b/test_regress/t/t_class_fwd_cc.pl @@ -2,6 +2,10 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # +# Copyright 2023 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt => 1); diff --git a/test_regress/t/t_class_member_sens.pl b/test_regress/t/t_class_member_sens.pl index cf6d969a8..cff05f43a 100755 --- a/test_regress/t/t_class_member_sens.pl +++ b/test_regress/t/t_class_member_sens.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_class_param_bad2.pl b/test_regress/t/t_class_param_bad2.pl index 19ba90d40..44783b1f6 100755 --- a/test_regress/t/t_class_param_bad2.pl +++ b/test_regress/t/t_class_param_bad2.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_clk_gate_ext.v b/test_regress/t/t_clk_gate_ext.v index 170ce63e6..5f50801bf 100644 --- a/test_regress/t/t_clk_gate_ext.v +++ b/test_regress/t/t_clk_gate_ext.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t(/*AUTOARG*/ // Inputs clk diff --git a/test_regress/t/t_clk_inp_init.pl b/test_regress/t/t_clk_inp_init.pl index a55bf1710..7a546294f 100755 --- a/test_regress/t/t_clk_inp_init.pl +++ b/test_regress/t/t_clk_inp_init.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2018 by Argon Design. This program is free software; you +# Copyright 2018 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the # GNU Lesser General Public License Version 3 or the Perl Artistic # License Version 2.0. diff --git a/test_regress/t/t_clocking_sched.pl b/test_regress/t/t_clocking_sched.pl index d68dacfed..f071267de 100755 --- a/test_regress/t/t_clocking_sched.pl +++ b/test_regress/t/t_clocking_sched.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_const_opt.cpp b/test_regress/t/t_const_opt.cpp index 116148dfb..fde57c973 100644 --- a/test_regress/t/t_const_opt.cpp +++ b/test_regress/t/t_const_opt.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2021 by Yutetsu TAKATSUKASA. This program is free software; you can +// Copyright 2023 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -9,5 +9,5 @@ // //************************************************************************* -// This function is used to introduce dependency and disturb optimization -extern "C" int fake_dependency() { return 0; } +// Fake dependency to avoid optimization +extern "C" int c_fake_dependency() { return 0; } diff --git a/test_regress/t/t_const_opt.v b/test_regress/t/t_const_opt.v index 38eb31bb9..dcdc1419e 100644 --- a/test_regress/t/t_const_opt.v +++ b/test_regress/t/t_const_opt.v @@ -7,7 +7,7 @@ // This function always returns 0, so safe to take bitwise OR with any value. // Calling this function stops constant folding as Verialtor does not know // what this function returns. -import "DPI-C" context function int fake_dependency(); +import "DPI-C" context function int c_fake_dependency(); module t(/*AUTOARG*/ // Inputs @@ -146,7 +146,7 @@ module bug3182(in, out); /* verilator lint_off WIDTH */ always @(in) - bit_source = fake_dependency() | in; + bit_source = c_fake_dependency() | in; wire [5:0] tmp = bit_source; // V3Gate should inline this wire out = ~(tmp >> 5) & (bit_source == 5'd10); @@ -203,7 +203,7 @@ module bug3445(input wire clk, input wire [31:0] in, output wire out); st[1] <= st[0]; st[2] <= st[1]; st[3] <= st[2]; - zero <= fake_dependency() > 0; + zero <= c_fake_dependency() > 0; end logic result0, result1, result2, result3; diff --git a/test_regress/t/t_const_opt_shortcut.cpp b/test_regress/t/t_const_opt_shortcut.cpp index 9d2e9bb33..44a695a94 100644 --- a/test_regress/t/t_const_opt_shortcut.cpp +++ b/test_regress/t/t_const_opt_shortcut.cpp @@ -1,4 +1,9 @@ +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2022 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + #include + extern "C" int import_func0() { static int c = 0; return ++c; diff --git a/test_regress/t/t_const_slicesel.v b/test_regress/t/t_const_slicesel.v index 244fa28ae..a4fec28f4 100644 --- a/test_regress/t/t_const_slicesel.v +++ b/test_regress/t/t_const_slicesel.v @@ -2,7 +2,7 @@ // // This file ONLY is placed under the Creative Commons Public Domain, for // any use, without warranty, 2021 by Michael Lefebvre. - +// SPDX-License-Identifier: CC0-1.0 module t(/*AUTOARG*/); diff --git a/test_regress/t/t_const_slicesel_bad.v b/test_regress/t/t_const_slicesel_bad.v index 15a7e0dc1..9d588a3ad 100644 --- a/test_regress/t/t_const_slicesel_bad.v +++ b/test_regress/t/t_const_slicesel_bad.v @@ -2,7 +2,7 @@ // // This file ONLY is placed under the Creative Commons Public Domain, for // any use, without warranty, 2021 by Michael Lefebvre. - +// SPDX-License-Identifier: CC0-1.0 module t(/*AUTOARG*/); diff --git a/test_regress/t/t_continue_do_while_bad.pl b/test_regress/t/t_continue_do_while_bad.pl index f201521f0..15b4f4a73 100755 --- a/test_regress/t/t_continue_do_while_bad.pl +++ b/test_regress/t/t_continue_do_while_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_convert2string.pl b/test_regress/t/t_convert2string.pl index 89a4e77d9..beaa2ca59 100755 --- a/test_regress/t/t_convert2string.pl +++ b/test_regress/t/t_convert2string.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(simulator => 1); diff --git a/test_regress/t/t_convert2string.v b/test_regress/t/t_convert2string.v index 990dfd2fc..9e85e81c9 100644 --- a/test_regress/t/t_convert2string.v +++ b/test_regress/t/t_convert2string.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Peter Monsson. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ // Inputs diff --git a/test_regress/t/t_dfg_3817.pl b/test_regress/t/t_dfg_3817.pl index 4e8f5dbef..31e4367f7 100755 --- a/test_regress/t/t_dfg_3817.pl +++ b/test_regress/t/t_dfg_3817.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Jevin Sweval. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -10,7 +10,6 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(vlt => 1); -# test case was causing use-after-free and segfaulting during Verilation compile(); ok(1); diff --git a/test_regress/t/t_func_const2_bad.pl b/test_regress/t/t_func_const2_bad.pl index ad607fff5..0fd907991 100755 --- a/test_regress/t/t_func_const2_bad.pl +++ b/test_regress/t/t_func_const2_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_func_const3_bad.pl b/test_regress/t/t_func_const3_bad.pl index 475b114ec..5ece32e17 100755 --- a/test_regress/t/t_func_const3_bad.pl +++ b/test_regress/t/t_func_const3_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -11,7 +11,6 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di scenarios(vlt => 1); lint( - v_flags2 => ["--lint-only"], fails => 1, expect_filename => $Self->{golden_filename}, ); diff --git a/test_regress/t/t_func_const_packed_array_bad.pl b/test_regress/t/t_func_const_packed_array_bad.pl index ad607fff5..0fd907991 100755 --- a/test_regress/t/t_func_const_packed_array_bad.pl +++ b/test_regress/t/t_func_const_packed_array_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_func_const_packed_struct_bad.pl b/test_regress/t/t_func_const_packed_struct_bad.pl index ad607fff5..0fd907991 100755 --- a/test_regress/t/t_func_const_packed_struct_bad.pl +++ b/test_regress/t/t_func_const_packed_struct_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_func_const_packed_struct_bad2.pl b/test_regress/t/t_func_const_packed_struct_bad2.pl index ad607fff5..0fd907991 100755 --- a/test_regress/t/t_func_const_packed_struct_bad2.pl +++ b/test_regress/t/t_func_const_packed_struct_bad2.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_func_const_struct_bad.pl b/test_regress/t/t_func_const_struct_bad.pl index ad607fff5..0fd907991 100755 --- a/test_regress/t/t_func_const_struct_bad.pl +++ b/test_regress/t/t_func_const_struct_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_generate_fatal_bad.pl b/test_regress/t/t_generate_fatal_bad.pl index 0a88b22ae..27159da5b 100755 --- a/test_regress/t/t_generate_fatal_bad.pl +++ b/test_regress/t/t_generate_fatal_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2019 by Todd Strader. This program is free software; you +# Copyright 2019 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_hier_block.pl b/test_regress/t/t_hier_block.pl index 57e67f0f9..620a1c458 100755 --- a/test_regress/t/t_hier_block.pl +++ b/test_regress/t/t_hier_block.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # stats will be deleted but generation will be skipped if libs of hierarchical blocks exist. clean_objs(); diff --git a/test_regress/t/t_hier_block.v b/test_regress/t/t_hier_block.v index e7c67c615..aaf0016f3 100644 --- a/test_regress/t/t_hier_block.v +++ b/test_regress/t/t_hier_block.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Yutetsu TAKATSUKASA +// SPDX-License-Identifier: Unlicense `ifdef USE_VLT `define HIER_BLOCK diff --git a/test_regress/t/t_hier_block0_bad.out b/test_regress/t/t_hier_block0_bad.out index 61e172e54..c3a778047 100644 --- a/test_regress/t/t_hier_block0_bad.out +++ b/test_regress/t/t_hier_block0_bad.out @@ -1,12 +1,12 @@ -%Error: t/t_hier_block0_bad.v:20:11: 'sub0' has hier_block metacomment, hierarchical Verilation supports only integer/floating point/string parameters +%Error: t/t_hier_block0_bad.v:21:11: 'sub0' has hier_block metacomment, hierarchical Verilation supports only integer/floating point/string parameters : ... In instance t - 20 | sub0 #(UNPACKED) i_sub0(.clk(clk), .in(8'(count)), .out(out0)); + 21 | sub0 #(UNPACKED) i_sub0(.clk(clk), .in(8'(count)), .out(out0)); | ^~~~~~~~ -%Error: t/t_hier_block0_bad.v:22:12: 'sub1' has hier_block metacomment, but 'parameter type' is not supported +%Error: t/t_hier_block0_bad.v:23:12: 'sub1' has hier_block metacomment, but 'parameter type' is not supported : ... In instance t - 22 | sub1 #(.T(logic[7:0])) i_sub1(.in(out0), .out(out1)); + 23 | sub1 #(.T(logic[7:0])) i_sub1(.in(out0), .out(out1)); | ^ -%Error: t/t_hier_block0_bad.v:26:42: Cannot access inside hierarchical block - 26 | $display("%d %d %d", count, i_sub0.ff, out1); +%Error: t/t_hier_block0_bad.v:27:42: Cannot access inside hierarchical block + 27 | $display("%d %d %d", count, i_sub0.ff, out1); | ^~ %Error: Exiting due to diff --git a/test_regress/t/t_hier_block0_bad.pl b/test_regress/t/t_hier_block0_bad.pl index 640769ddd..39bf8dbac 100755 --- a/test_regress/t/t_hier_block0_bad.pl +++ b/test_regress/t/t_hier_block0_bad.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt => 1); diff --git a/test_regress/t/t_hier_block0_bad.v b/test_regress/t/t_hier_block0_bad.v index bcb4ee144..45c0ca79c 100644 --- a/test_regress/t/t_hier_block0_bad.v +++ b/test_regress/t/t_hier_block0_bad.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Yutetsu TAKATSUKASA +// SPDX-License-Identifier: Unlicense `define HIER_BLOCK /*verilator hier_block*/ diff --git a/test_regress/t/t_hier_block1_bad.out b/test_regress/t/t_hier_block1_bad.out index cdc8f49b2..4e7234c0f 100644 --- a/test_regress/t/t_hier_block1_bad.out +++ b/test_regress/t/t_hier_block1_bad.out @@ -1,16 +1,16 @@ -%Warning-HIERBLOCK: t/t_hier_block1_bad.v:15:8: Top module illegally marked hierarchical block, ignoring marking +%Warning-HIERBLOCK: t/t_hier_block1_bad.v:16:8: Top module illegally marked hierarchical block, ignoring marking : ... In instance t : ... Suggest remove verilator hier_block on this module - 15 | module t ( + 16 | module t ( | ^ ... For warning description see https://verilator.org/warn/HIERBLOCK?v=latest ... Use "/* verilator lint_off HIERBLOCK */" and lint_on around source to disable this message. -%Error: t/t_hier_block1_bad.v:44:32: Modport cannot be used at the hierarchical block boundary +%Error: t/t_hier_block1_bad.v:45:32: Modport cannot be used at the hierarchical block boundary : ... In instance t.i_sub1 - 44 | module sub1 (byte_ifs.receiver in, byte_ifs.sender out); /*verilator hier_block*/ + 45 | module sub1 (byte_ifs.receiver in, byte_ifs.sender out); /*verilator hier_block*/ | ^~ -%Error: t/t_hier_block1_bad.v:44:52: Modport cannot be used at the hierarchical block boundary +%Error: t/t_hier_block1_bad.v:45:52: Modport cannot be used at the hierarchical block boundary : ... In instance t.i_sub1 - 44 | module sub1 (byte_ifs.receiver in, byte_ifs.sender out); /*verilator hier_block*/ + 45 | module sub1 (byte_ifs.receiver in, byte_ifs.sender out); /*verilator hier_block*/ | ^~~ %Error: Exiting due to diff --git a/test_regress/t/t_hier_block1_bad.pl b/test_regress/t/t_hier_block1_bad.pl index 640769ddd..39bf8dbac 100755 --- a/test_regress/t/t_hier_block1_bad.pl +++ b/test_regress/t/t_hier_block1_bad.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt => 1); diff --git a/test_regress/t/t_hier_block1_bad.v b/test_regress/t/t_hier_block1_bad.v index c42918a47..8427b6c27 100644 --- a/test_regress/t/t_hier_block1_bad.v +++ b/test_regress/t/t_hier_block1_bad.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Yutetsu TAKATSUKASA +// SPDX-License-Identifier: Unlicense `define HIER_BLOCK /*verilator hier_block*/ diff --git a/test_regress/t/t_hier_block_cmake.pl b/test_regress/t/t_hier_block_cmake.pl index 5b4e4c0db..8ccd098fa 100755 --- a/test_regress/t/t_hier_block_cmake.pl +++ b/test_regress/t/t_hier_block_cmake.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # If a test fails, broken .cmake may disturb the next run clean_objs(); diff --git a/test_regress/t/t_hier_block_libmod.pl b/test_regress/t/t_hier_block_libmod.pl index 6fcdd000e..4f6d583d9 100755 --- a/test_regress/t/t_hier_block_libmod.pl +++ b/test_regress/t/t_hier_block_libmod.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt_all => 1); diff --git a/test_regress/t/t_hier_block_libmod.v b/test_regress/t/t_hier_block_libmod.v index deaeb9fe2..91a96da98 100644 --- a/test_regress/t/t_hier_block_libmod.v +++ b/test_regress/t/t_hier_block_libmod.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Yutetsu TAKATSUKASA +// SPDX-License-Identifier: Unlicense module t; t_flag_relinc_sub i_t_flag_relinc_sub(); diff --git a/test_regress/t/t_hier_block_nohier.pl b/test_regress/t/t_hier_block_nohier.pl index 1e6459608..9b5be406b 100755 --- a/test_regress/t/t_hier_block_nohier.pl +++ b/test_regress/t/t_hier_block_nohier.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # This test makes sure that the internal check of t_hier_block.v is correct. # --hierarchical option is not set intentionally. diff --git a/test_regress/t/t_hier_block_prot_lib.pl b/test_regress/t/t_hier_block_prot_lib.pl index c48b890ec..13cf91c7a 100755 --- a/test_regress/t/t_hier_block_prot_lib.pl +++ b/test_regress/t/t_hier_block_prot_lib.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 top_filename("t/t_hier_block.v"); diff --git a/test_regress/t/t_hier_block_prot_lib_shared.pl b/test_regress/t/t_hier_block_prot_lib_shared.pl index 0abe249aa..0e5239345 100755 --- a/test_regress/t/t_hier_block_prot_lib_shared.pl +++ b/test_regress/t/t_hier_block_prot_lib_shared.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 top_filename("t/t_hier_block.v"); diff --git a/test_regress/t/t_hier_block_sc.pl b/test_regress/t/t_hier_block_sc.pl index 4fa44b103..4a14b17d5 100755 --- a/test_regress/t/t_hier_block_sc.pl +++ b/test_regress/t/t_hier_block_sc.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # stats will be deleted but generation will be skipped if libs of hierarchical blocks exist. clean_objs(); diff --git a/test_regress/t/t_hier_block_sc_trace_fst.pl b/test_regress/t/t_hier_block_sc_trace_fst.pl index c97ca0bd5..8eb7a21c9 100755 --- a/test_regress/t/t_hier_block_sc_trace_fst.pl +++ b/test_regress/t/t_hier_block_sc_trace_fst.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # stats will be deleted but generation will be skipped if libs of hierarchical blocks exist. clean_objs(); diff --git a/test_regress/t/t_hier_block_sc_trace_vcd.pl b/test_regress/t/t_hier_block_sc_trace_vcd.pl index 8c073d327..52b2816a1 100755 --- a/test_regress/t/t_hier_block_sc_trace_vcd.pl +++ b/test_regress/t/t_hier_block_sc_trace_vcd.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # stats will be deleted but generation will be skipped if libs of hierarchical blocks exist. clean_objs(); diff --git a/test_regress/t/t_hier_block_trace_fst.pl b/test_regress/t/t_hier_block_trace_fst.pl index 4020fcf02..f5e8a33c1 100755 --- a/test_regress/t/t_hier_block_trace_fst.pl +++ b/test_regress/t/t_hier_block_trace_fst.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt_all => 1); diff --git a/test_regress/t/t_hier_block_trace_vcd.pl b/test_regress/t/t_hier_block_trace_vcd.pl index 89e6b18a6..1dc8b71cf 100755 --- a/test_regress/t/t_hier_block_trace_vcd.pl +++ b/test_regress/t/t_hier_block_trace_vcd.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt_all => 1); diff --git a/test_regress/t/t_hier_block_vlt.pl b/test_regress/t/t_hier_block_vlt.pl index e6290474a..115e05367 100755 --- a/test_regress/t/t_hier_block_vlt.pl +++ b/test_regress/t/t_hier_block_vlt.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 # stats will be deleted but generation will be skipped if libs of hierarchical blocks exist. clean_objs(); diff --git a/test_regress/t/t_hier_block_vlt.vlt b/test_regress/t/t_hier_block_vlt.vlt index b8e6105c9..60a2d4c37 100644 --- a/test_regress/t/t_hier_block_vlt.vlt +++ b/test_regress/t/t_hier_block_vlt.vlt @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Yutetsu TAKATSUKASA +// SPDX-License-Identifier: Unlicense `verilator_config hier_block -module "sub?" diff --git a/test_regress/t/t_hier_bynum.pl b/test_regress/t/t_hier_bynum.pl index 2c0fb4904..4e314adef 100755 --- a/test_regress/t/t_hier_bynum.pl +++ b/test_regress/t/t_hier_bynum.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt_all => 1); diff --git a/test_regress/t/t_hier_bynum.v b/test_regress/t/t_hier_bynum.v index fe76f1e8f..78307d98b 100644 --- a/test_regress/t/t_hier_bynum.v +++ b/test_regress/t/t_hier_bynum.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2022 by Wilson Snyder. +// SPDX-License-Identifier: Unlicense module flop (q, d, clk); // No AUTOARG; order of below is different from port order above diff --git a/test_regress/t/t_if_swap.v b/test_regress/t/t_if_swap.v index d1e771433..2dc1ef29d 100644 --- a/test_regress/t/t_if_swap.v +++ b/test_regress/t/t_if_swap.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t (/*AUTOARG*/ // Inputs diff --git a/test_regress/t/t_increment_bad.out b/test_regress/t/t_increment_bad.out index f10697bd0..026148082 100644 --- a/test_regress/t/t_increment_bad.out +++ b/test_regress/t/t_increment_bad.out @@ -1,26 +1,26 @@ -%Error-UNSUPPORTED: t/t_increment_bad.v:15:31: Unsupported: Incrementation in this context. - 15 | if (0 && test_string[pos++] != "e"); +%Error-UNSUPPORTED: t/t_increment_bad.v:21:31: Unsupported: Incrementation in this context. + 21 | if (0 && test_string[pos++] != "e"); | ^~ ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest -%Error-UNSUPPORTED: t/t_increment_bad.v:16:19: Unsupported: Incrementation in this context. - 16 | if (1 || pos-- != 1); +%Error-UNSUPPORTED: t/t_increment_bad.v:22:19: Unsupported: Incrementation in this context. + 22 | if (1 || pos-- != 1); | ^~ -%Error-UNSUPPORTED: t/t_increment_bad.v:18:17: Unsupported: Incrementation in this context. - 18 | if (a <-> --b); +%Error-UNSUPPORTED: t/t_increment_bad.v:24:17: Unsupported: Incrementation in this context. + 24 | if (a <-> --b); | ^~ -%Error-UNSUPPORTED: t/t_increment_bad.v:19:16: Unsupported: Incrementation in this context. - 19 | if (0 -> ++b); +%Error-UNSUPPORTED: t/t_increment_bad.v:25:16: Unsupported: Incrementation in this context. + 25 | if (0 -> ++b); | ^~ -%Error-UNSUPPORTED: t/t_increment_bad.v:21:24: Unsupported: Incrementation in this context. - 21 | pos = (a > 0) ? a++ : --b; +%Error-UNSUPPORTED: t/t_increment_bad.v:27:24: Unsupported: Incrementation in this context. + 27 | pos = (a > 0) ? a++ : --b; | ^~ -%Error-UNSUPPORTED: t/t_increment_bad.v:21:29: Unsupported: Incrementation in this context. - 21 | pos = (a > 0) ? a++ : --b; +%Error-UNSUPPORTED: t/t_increment_bad.v:27:29: Unsupported: Incrementation in this context. + 27 | pos = (a > 0) ? a++ : --b; | ^~ -%Error-UNSUPPORTED: t/t_increment_bad.v:23:24: Unsupported: Incrementation in this context. - 23 | pos = array[0][0]++; +%Error-UNSUPPORTED: t/t_increment_bad.v:29:24: Unsupported: Incrementation in this context. + 29 | pos = array[0][0]++; | ^~ -%Error-UNSUPPORTED: t/t_increment_bad.v:26:37: Unsupported: Incrementation in this context. - 26 | assert property (@(posedge clk) a++ >= 0); +%Error-UNSUPPORTED: t/t_increment_bad.v:32:37: Unsupported: Incrementation in this context. + 32 | assert property (@(posedge clk) a++ >= 0); | ^~ %Error: Exiting due to diff --git a/test_regress/t/t_increment_bad.pl b/test_regress/t/t_increment_bad.pl index 385b304e3..23eda8f99 100755 --- a/test_regress/t/t_increment_bad.pl +++ b/test_regress/t/t_increment_bad.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt => 1); diff --git a/test_regress/t/t_increment_bad.v b/test_regress/t/t_increment_bad.v index 86755af51..11c031177 100644 --- a/test_regress/t/t_increment_bad.v +++ b/test_regress/t/t_increment_bad.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t (/*AUTOARG*/ // Inputs clk diff --git a/test_regress/t/t_jumps_do_while.pl b/test_regress/t/t_jumps_do_while.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_jumps_do_while.pl +++ b/test_regress/t/t_jumps_do_while.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_lib_prot_exe_bad.pl b/test_regress/t/t_lib_prot_exe_bad.pl index a89483bf5..9700f4120 100755 --- a/test_regress/t/t_lib_prot_exe_bad.pl +++ b/test_regress/t/t_lib_prot_exe_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Yinan Xu. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_lint_latch_1.v b/test_regress/t/t_lint_latch_1.v index 95ae861c2..99987cfbc 100644 --- a/test_regress/t/t_lint_latch_1.v +++ b/test_regress/t/t_lint_latch_1.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Julien Margetts. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ a, b, o); input a; diff --git a/test_regress/t/t_lint_latch_2.v b/test_regress/t/t_lint_latch_2.v index d3c93d9d0..5ce9ec5e5 100644 --- a/test_regress/t/t_lint_latch_2.v +++ b/test_regress/t/t_lint_latch_2.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Julien Margetts. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ i, o); diff --git a/test_regress/t/t_lint_latch_3.v b/test_regress/t/t_lint_latch_3.v index 6ba537f89..b38862ece 100644 --- a/test_regress/t/t_lint_latch_3.v +++ b/test_regress/t/t_lint_latch_3.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Julien Margetts. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ out, out2, in ); diff --git a/test_regress/t/t_lint_latch_4.v b/test_regress/t/t_lint_latch_4.v index 9f5504dc0..628af7315 100644 --- a/test_regress/t/t_lint_latch_4.v +++ b/test_regress/t/t_lint_latch_4.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2021 by Julien Margetts (Originally provided by YanJiun) +// SPDX-License-Identifier: Unlicense module test ( input [2:0] a, diff --git a/test_regress/t/t_lint_latch_5.v b/test_regress/t/t_lint_latch_5.v index dcca92df8..c8d5697e8 100644 --- a/test_regress/t/t_lint_latch_5.v +++ b/test_regress/t/t_lint_latch_5.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2021 by Julien Margetts (Originally provided by Thomas Sailer) +// SPDX-License-Identifier: Unlicense module test (input logic [1:0] a, diff --git a/test_regress/t/t_lint_latch_bad_2.out b/test_regress/t/t_lint_latch_bad_2.out index 29e592071..8d2070747 100644 --- a/test_regress/t/t_lint_latch_bad_2.out +++ b/test_regress/t/t_lint_latch_bad_2.out @@ -1,6 +1,6 @@ -%Warning-LATCH: t/t_lint_latch_bad_2.v:11:4: Latch inferred for signal 'o' (not all control paths of combinational always assign a value) +%Warning-LATCH: t/t_lint_latch_bad_2.v:12:4: Latch inferred for signal 'o' (not all control paths of combinational always assign a value) : ... Suggest use of always_latch for intentional latches - 11 | always_comb + 12 | always_comb | ^~~~~~~~~~~ ... For warning description see https://verilator.org/warn/LATCH?v=latest ... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message. diff --git a/test_regress/t/t_lint_latch_bad_2.pl b/test_regress/t/t_lint_latch_bad_2.pl index 34ebfdc61..70301e9b6 100755 --- a/test_regress/t/t_lint_latch_bad_2.pl +++ b/test_regress/t/t_lint_latch_bad_2.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(linter => 1); diff --git a/test_regress/t/t_lint_latch_bad_2.v b/test_regress/t/t_lint_latch_bad_2.v index e738dc23b..531995874 100644 --- a/test_regress/t/t_lint_latch_bad_2.v +++ b/test_regress/t/t_lint_latch_bad_2.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Julien Margetts. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ a, b, o); input a; diff --git a/test_regress/t/t_lint_latch_bad_3.out b/test_regress/t/t_lint_latch_bad_3.out index cb89d481a..93a9577b8 100644 --- a/test_regress/t/t_lint_latch_bad_3.out +++ b/test_regress/t/t_lint_latch_bad_3.out @@ -1,6 +1,6 @@ -%Warning-LATCH: t/t_lint_latch_bad_3.v:18:1: Latch inferred for signal 'o5' (not all control paths of combinational always assign a value) +%Warning-LATCH: t/t_lint_latch_bad_3.v:19:1: Latch inferred for signal 'o5' (not all control paths of combinational always assign a value) : ... Suggest use of always_latch for intentional latches - 18 | always_comb + 19 | always_comb | ^~~~~~~~~~~ ... For warning description see https://verilator.org/warn/LATCH?v=latest ... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message. diff --git a/test_regress/t/t_lint_latch_bad_3.pl b/test_regress/t/t_lint_latch_bad_3.pl index 34ebfdc61..70301e9b6 100755 --- a/test_regress/t/t_lint_latch_bad_3.pl +++ b/test_regress/t/t_lint_latch_bad_3.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(linter => 1); diff --git a/test_regress/t/t_lint_latch_bad_3.v b/test_regress/t/t_lint_latch_bad_3.v index 83a87b16d..4f1ba7c9c 100644 --- a/test_regress/t/t_lint_latch_bad_3.v +++ b/test_regress/t/t_lint_latch_bad_3.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Julien Margetts. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ reset, a, b, c, en, o1, o2, o3, o4, o5); input reset; diff --git a/test_regress/t/t_lint_literal_bad.pl b/test_regress/t/t_lint_literal_bad.pl index 5d6c58d7d..5ece32e17 100755 --- a/test_regress/t/t_lint_literal_bad.pl +++ b/test_regress/t/t_lint_literal_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2017 by Todd Strader. This program is free software; you +# Copyright 2017 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_lint_nolatch_bad.out b/test_regress/t/t_lint_nolatch_bad.out index 8a229bd07..a7cc97b2b 100644 --- a/test_regress/t/t_lint_nolatch_bad.out +++ b/test_regress/t/t_lint_nolatch_bad.out @@ -1,5 +1,5 @@ -%Warning-NOLATCH: t/t_lint_nolatch_bad.v:11:4: No latches detected in always_latch block - 11 | always_latch +%Warning-NOLATCH: t/t_lint_nolatch_bad.v:12:4: No latches detected in always_latch block + 12 | always_latch | ^~~~~~~~~~~~ ... For warning description see https://verilator.org/warn/NOLATCH?v=latest ... Use "/* verilator lint_off NOLATCH */" and lint_on around source to disable this message. diff --git a/test_regress/t/t_lint_nolatch_bad.pl b/test_regress/t/t_lint_nolatch_bad.pl index 0b13642c9..a8b75812f 100755 --- a/test_regress/t/t_lint_nolatch_bad.pl +++ b/test_regress/t/t_lint_nolatch_bad.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(linter => 1); diff --git a/test_regress/t/t_lint_nolatch_bad.v b/test_regress/t/t_lint_nolatch_bad.v index 5f88a38c3..0119646b1 100644 --- a/test_regress/t/t_lint_nolatch_bad.v +++ b/test_regress/t/t_lint_nolatch_bad.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Julien Margetts. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ a, b, o); input a; diff --git a/test_regress/t/t_lint_pinnotfound.pl b/test_regress/t/t_lint_pinnotfound.pl index 7314796b8..aca1cb3c1 100755 --- a/test_regress/t/t_lint_pinnotfound.pl +++ b/test_regress/t/t_lint_pinnotfound.pl @@ -2,6 +2,10 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # +# Copyright 2023 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(vlt => 1); diff --git a/test_regress/t/t_lint_pragma_protected.v b/test_regress/t/t_lint_pragma_protected.v index dc8eb4cad..3852391fc 100644 --- a/test_regress/t/t_lint_pragma_protected.v +++ b/test_regress/t/t_lint_pragma_protected.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2021 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + // This part should pass OK module t_lint_pragma_protected; diff --git a/test_regress/t/t_lint_pragma_protected_bad.out b/test_regress/t/t_lint_pragma_protected_bad.out index bb729a9e2..a19cc9826 100644 --- a/test_regress/t/t_lint_pragma_protected_bad.out +++ b/test_regress/t/t_lint_pragma_protected_bad.out @@ -1,53 +1,53 @@ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:8:17: Unknown '`pragma protect' error - 8 | `pragma protect encrypt_agent=123 +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:14:17: Unknown '`pragma protect' error + 14 | `pragma protect encrypt_agent=123 | ^~~~~~~~~~~~~~~~~ ... For error description see https://verilator.org/warn/BADSTDPRAGMA?v=latest -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:10:17: Unknown '`pragma protect' error - 10 | `pragma protect encrypt_agent_info +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:16:17: Unknown '`pragma protect' error + 16 | `pragma protect encrypt_agent_info | ^~~~~~~~~~~~~~~~~~ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:23:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:27:17: multiple `pragma protected encoding sections - 27 | `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128) +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:29:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:33:17: multiple `pragma protected encoding sections + 33 | `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:44:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. +%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:50:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. ... Use "/* verilator lint_off PROTECTED */" and lint_on around source to disable this message. -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:51:17: Illegal encoding type for `pragma protected encoding - 51 | `pragma protect encoding = (enctype = "A-bad-not-BASE64", line_length = 1, bytes = 295) +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:57:17: Illegal encoding type for `pragma protected encoding + 57 | `pragma protect encoding = (enctype = "A-bad-not-BASE64", line_length = 1, bytes = 295) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -%Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:51:17: Unsupported: only BASE64 is recognized for `pragma protected encoding - 51 | `pragma protect encoding = (enctype = "A-bad-not-BASE64", line_length = 1, bytes = 295) +%Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:57:17: Unsupported: only BASE64 is recognized for `pragma protected encoding + 57 | `pragma protect encoding = (enctype = "A-bad-not-BASE64", line_length = 1, bytes = 295) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:53:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:54:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block - 54 | c2lvbiAzIG9mIHRoZSBHTlUgTGVzc2VyCkdlbmVyYWwgUHVibGljIExpY2Vuc2UsIGFuZCB0aGUg +%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:59:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:60:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block + 60 | c2lvbiAzIG9mIHRoZSBHTlUgTGVzc2VyCkdlbmVyYWwgUHVibGljIExpY2Vuc2UsIGFuZCB0aGUg | ^ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:55:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block - 55 | IkdOVSBHUEwiIHJlZmVycyB0byB2ZXJzaW9uIDMgb2YgdGhlIEdOVQpHZW5lcmFsIFB1YmxpYyBM +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:61:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block + 61 | IkdOVSBHUEwiIHJlZmVycyB0byB2ZXJzaW9uIDMgb2YgdGhlIEdOVQpHZW5lcmFsIFB1YmxpYyBM | ^ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:56:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block - 56 | aWNlbnNlLgoKICAiVGhlIExpYnJhcnkiIHJlZmVycyB0byBhIGNvdmVyZWQgd29yayBnb3Zlcm5l +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:62:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block + 62 | aWNlbnNlLgoKICAiVGhlIExpYnJhcnkiIHJlZmVycyB0byBhIGNvdmVyZWQgd29yayBnb3Zlcm5l | ^ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:57:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block - 57 | ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:63:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block + 63 | ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l | ^ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:58:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block - 58 | ZCBXb3JrIGFzIG== +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block + 64 | ZCBXb3JrIGFzIG== | ^ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:59:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:59:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block -%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:63:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 line too long in `pragma protect key_bloock/data_block -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:66:17: multiple `pragma protected encoding sections - 66 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4) +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:65:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:65:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block +%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:69:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 line too long in `pragma protect key_bloock/data_block +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:17: multiple `pragma protected encoding sections + 72 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:66:17: line_length must be multiple of 4 for BASE64 - 66 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4) +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:17: line_length must be multiple of 4 for BASE64 + 72 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:68:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:69:1: BASE64 line too long in `pragma protect key_bloock/data_block -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:69:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block -%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:77:1: `pragma is missing a pragma_expression. - 77 | `pragma +%Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:74:17: A '`pragma protected data_block' encrypted section was detected and will be skipped. +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 line too long in `pragma protect key_bloock/data_block +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block +%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:83:1: `pragma is missing a pragma_expression. + 83 | `pragma | ^~~~~~~ %Error: Exiting due to diff --git a/test_regress/t/t_lint_pragma_protected_bad.v b/test_regress/t/t_lint_pragma_protected_bad.v index 6d4f4e5e2..68e3c159d 100644 --- a/test_regress/t/t_lint_pragma_protected_bad.v +++ b/test_regress/t/t_lint_pragma_protected_bad.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2021 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t_lint_pragma_protected_err; // This part should see some failures diff --git a/test_regress/t/t_math_signed_calc.pl b/test_regress/t/t_math_signed_calc.pl index 700b77233..1aa73f80a 100755 --- a/test_regress/t/t_math_signed_calc.pl +++ b/test_regress/t/t_math_signed_calc.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Raynard Qiao. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_negated_property.pl b/test_regress/t/t_negated_property.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_negated_property.pl +++ b/test_regress/t/t_negated_property.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_package_struct.pl b/test_regress/t/t_package_struct.pl index f2e251072..11eeb66fe 100755 --- a/test_regress/t/t_package_struct.pl +++ b/test_regress/t/t_package_struct.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_past_funcs.pl b/test_regress/t/t_past_funcs.pl index c1a6773e9..e2cfde569 100755 --- a/test_regress/t/t_past_funcs.pl +++ b/test_regress/t/t_past_funcs.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(simulator => 1); diff --git a/test_regress/t/t_past_funcs.v b/test_regress/t/t_past_funcs.v index 8afd03029..2dce45368 100644 --- a/test_regress/t/t_past_funcs.v +++ b/test_regress/t/t_past_funcs.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Peter Monsson. +// SPDX-License-Identifier: Unlicense module t (/*AUTOARG*/ // Inputs diff --git a/test_regress/t/t_past_strobe.pl b/test_regress/t/t_past_strobe.pl index 4bbe254e3..a2660234f 100755 --- a/test_regress/t/t_past_strobe.pl +++ b/test_regress/t/t_past_strobe.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_pkg_using_dollar_unit_items.pl b/test_regress/t/t_pkg_using_dollar_unit_items.pl index bf4e4ce9f..7b483d32e 100755 --- a/test_regress/t/t_pkg_using_dollar_unit_items.pl +++ b/test_regress/t/t_pkg_using_dollar_unit_items.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_preproc_str_undef.v b/test_regress/t/t_preproc_str_undef.v index f02544542..1ab629a7f 100644 --- a/test_regress/t/t_preproc_str_undef.v +++ b/test_regress/t/t_preproc_str_undef.v @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + `define PREFIX_ my_prefix_ `define SUFFIX my_suffix `define PREFIX_SUFFIX my_prefix_suffix diff --git a/test_regress/t/t_process_redecl.pl b/test_regress/t/t_process_redecl.pl index f697727ea..10266d6f8 100755 --- a/test_regress/t/t_process_redecl.pl +++ b/test_regress/t/t_process_redecl.pl @@ -6,6 +6,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 scenarios(linter => 1); diff --git a/test_regress/t/t_pub_unpacked_port.pl b/test_regress/t/t_pub_unpacked_port.pl index 4aa53aa05..55bd57e5c 100755 --- a/test_regress/t/t_pub_unpacked_port.pl +++ b/test_regress/t/t_pub_unpacked_port.pl @@ -2,17 +2,17 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Todd Strader. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 -scenarios( - vlt => 1, - ); +scenarios(vlt => 1); compile(); + execute(); + ok(1); 1; diff --git a/test_regress/t/t_queue_method3_bad.pl b/test_regress/t/t_queue_method3_bad.pl index fbdf9000e..a083f46f5 100755 --- a/test_regress/t/t_queue_method3_bad.pl +++ b/test_regress/t/t_queue_method3_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_recursive_module_bug_2.v b/test_regress/t/t_recursive_module_bug_2.v index fd47d945b..13ab908cf 100644 --- a/test_regress/t/t_recursive_module_bug_2.v +++ b/test_regress/t/t_recursive_module_bug_2.v @@ -4,6 +4,7 @@ // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. +// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 module a #(parameter N) (); generate if (N > 1) begin diff --git a/test_regress/t/t_sampled_expr.pl b/test_regress/t/t_sampled_expr.pl index c505d6263..a86f4c404 100755 --- a/test_regress/t/t_sampled_expr.pl +++ b/test_regress/t/t_sampled_expr.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_sc_names.pl b/test_regress/t/t_sc_names.pl index 2dc3e81c8..c234cca69 100755 --- a/test_regress/t/t_sc_names.pl +++ b/test_regress/t/t_sc_names.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2020 by Edgar E. Iglesias. This program is free software; you +# Copyright 2020 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -14,11 +14,9 @@ if (!$Self->have_sc) { skip("No SystemC installed"); } else { - top_filename("t/t_sc_names.v"); - compile( make_main => 0, - verilator_flags2 => ["-sc --exe $Self->{t_dir}/t_sc_names.cpp"], + verilator_flags2 => ["-sc --exe $Self->{t_dir}/$Self->{name}.cpp"], ); execute( diff --git a/test_regress/t/t_std_pkg_bad.pl b/test_regress/t/t_std_pkg_bad.pl index 19ba90d40..44783b1f6 100755 --- a/test_regress/t/t_std_pkg_bad.pl +++ b/test_regress/t/t_std_pkg_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_strength_2_uneq_assign.pl b/test_regress/t/t_strength_2_uneq_assign.pl index 19ba90d40..44783b1f6 100755 --- a/test_regress/t/t_strength_2_uneq_assign.pl +++ b/test_regress/t/t_strength_2_uneq_assign.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_strength_bufif1.pl b/test_regress/t/t_strength_bufif1.pl index 35c0dfe5b..52f7cc53a 100755 --- a/test_regress/t/t_strength_bufif1.pl +++ b/test_regress/t/t_strength_bufif1.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_strength_strong1_strong1_bad.pl b/test_regress/t/t_strength_strong1_strong1_bad.pl index 19ba90d40..44783b1f6 100755 --- a/test_regress/t/t_strength_strong1_strong1_bad.pl +++ b/test_regress/t/t_strength_strong1_strong1_bad.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_struct_assign.pl b/test_regress/t/t_struct_assign.pl index f2e251072..11eeb66fe 100755 --- a/test_regress/t/t_struct_assign.pl +++ b/test_regress/t/t_struct_assign.pl @@ -2,7 +2,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Antmicro Ltd. This program is free software; you +# Copyright 2022 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/t/t_timescale_parse.cpp b/test_regress/t/t_timescale_parse.cpp index 128a1b2e8..0b4da3371 100644 --- a/test_regress/t/t_timescale_parse.cpp +++ b/test_regress/t/t_timescale_parse.cpp @@ -1,7 +1,8 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- // -// This file ONLY is placed into the Public Domain, for any use, -// without warranty, 2019 by Wilson Snyder +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2019 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 #include "Vt_timescale_parse.h" diff --git a/test_regress/t/t_trace_open_wrong_order_bad.pl b/test_regress/t/t_trace_open_wrong_order_bad.pl index a7c8b6c51..12e11bbab 100755 --- a/test_regress/t/t_trace_open_wrong_order_bad.pl +++ b/test_regress/t/t_trace_open_wrong_order_bad.pl @@ -2,28 +2,24 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } # DESCRIPTION: Verilator: Verilog Test driver/expect definition # -# Copyright 2022 by Yu-Sheng Lin. This program is free software; you +# Copyright 2023 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 -scenarios(simulator => 1); +scenarios(vlt => 1); -if ($Self->{vlt_all}) { - compile( - verilator_flags2 => ["--cc --trace --exe $Self->{t_dir}/$Self->{name}.cpp"], - make_top_shell => 0, - make_main => 0, - ); -} else { - compile( - ); -} +compile( + verilator_flags2 => ["--cc --trace --exe $Self->{t_dir}/$Self->{name}.cpp"], + make_top_shell => 0, + make_main => 0, + ); execute( fails => 1 ); + file_grep($Self->{run_log_filename}, qr/::trace\(\)' shall not be called after 'VerilatedVcdC::open\(\)'/i); ok(1); diff --git a/test_regress/t/t_unopt_combo.vlt b/test_regress/t/t_unopt_combo.vlt index 21286681d..5231aa4e6 100644 --- a/test_regress/t/t_unopt_combo.vlt +++ b/test_regress/t/t_unopt_combo.vlt @@ -1,3 +1,9 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + `verilator_config lint_off -rule UNOPTFLAT -file "*t_unopt_combo.v" -match "Signal unoptimizable: Circular combinational logic: *" diff --git a/test_regress/t/t_unpacked_slice_range.v b/test_regress/t/t_unpacked_slice_range.v index 58c1bc6a1..c1e46fa27 100644 --- a/test_regress/t/t_unpacked_slice_range.v +++ b/test_regress/t/t_unpacked_slice_range.v @@ -2,6 +2,7 @@ // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2020 by Yutetsu TAKATSUKASA +// SPDX-License-Identifier: Unlicense module t ( clk diff --git a/test_regress/t/t_vlt_syntax_bad.v b/test_regress/t/t_vlt_syntax_bad.v index 6370f0978..0f1777e05 100644 --- a/test_regress/t/t_vlt_syntax_bad.v +++ b/test_regress/t/t_vlt_syntax_bad.v @@ -1,2 +1,8 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + module t; endmodule diff --git a/test_regress/t/t_waiveroutput_allgood.vlt b/test_regress/t/t_waiveroutput_allgood.vlt index 2f6af4e29..54c5798f2 100644 --- a/test_regress/t/t_waiveroutput_allgood.vlt +++ b/test_regress/t/t_waiveroutput_allgood.vlt @@ -1,12 +1,11 @@ -// DESCRIPTION: Verilator output: Waivers generated with --waiver-output +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2020 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 `verilator_config -// Below you find suggested waivers. You have three options: -// 1. Fix the reason for the linter warning -// 2. Keep the waiver permanently if you are sure this is okay -// 3. Keep the waiver temporarily to suppress the output - lint_off -rule WIDTH -file "*t/t_waiveroutput.v" -match "Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS's CONST '2'h3' generates 2 bits." lint_off -rule UNUSED -file "*t/t_waiveroutput.v" -match "Signal is not used: 'width_warn'"