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Fix push to dynamic queue in struct (#4015).

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Wilson Snyder 2023-03-13 22:03:53 -04:00
parent f13e753b52
commit 2c62714a30
4 changed files with 59 additions and 0 deletions
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@ -20,6 +20,7 @@ Verilator 5.009 devel
* Change ZERODLY to a warning.
* Fix UNDRIVEN warning seg fault (#3989). [Felix Neumärker]
* Fix symbol entries when inheriting classes (#3995) (#3996). [Krzysztof Bieganski, Antmicro Ltd]
* Fix push to dynamic queue in struct (#4015). [ezchi]
Verilator 5.008 2023-03-04

2
src/V3Width.cpp
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@ -3200,6 +3200,8 @@ private:
varrefp->access(access);
} else if (const AstMemberSel* const ichildp = VN_CAST(childp, MemberSel)) {
methodCallLValueRecurse(nodep, ichildp->fromp(), access);
} else if (const AstStructSel* const ichildp = VN_CAST(childp, StructSel)) {
methodCallLValueRecurse(nodep, ichildp->fromp(), access);
} else if (const AstNodeSel* const ichildp = VN_CAST(childp, NodeSel)) {
methodCallLValueRecurse(nodep, ichildp->fromp(), access);
} else {

21
test_regress/t/t_queue_struct.pl Executable file
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@ -0,0 +1,21 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2019 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(simulator => 1);
compile(
);
execute(
check_finished => 1,
);
ok(1);
1;

35
test_regress/t/t_queue_struct.v Normal file
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@ -0,0 +1,35 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2020 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
module t (/*AUTOARG*/);
typedef struct {
int b[$];
} st_t;
function automatic st_t bar();
// verilator no_inline_task
for (int i = 0; i < 4; ++i) begin
bar.b.push_back(i);
end
endfunction // bar
st_t res;
initial begin
res = bar();
`checkd(res.b[0], 0);
`checkd(res.b[1], 1);
`checkd(res.b[2], 2);
`checkd(res.b[3], 3);
$write("*-* All Finished *-*\n");
$finish;
end
endmodule