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Commentary: Changes update

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Wilson Snyder 2024-10-07 19:03:21 -04:00
parent 338d54fd34
commit 2c445e4bfd
3 changed files with 9 additions and 1 deletions
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@ -13,6 +13,7 @@ Verilator 5.029 devel
**Major:** **Major:**
* Add `-output-groups` to build with concatenated .cpp files (#5257). [Mariusz Glebocki]
* Self-tests have been converted to Python, run `{test_name}.py` instead of `{test_name}.pl`. * Self-tests have been converted to Python, run `{test_name}.py` instead of `{test_name}.pl`.
**Minor:** **Minor:**
@ -27,6 +28,7 @@ Verilator 5.029 devel
* Support appending to queue via `[]` (#5421). [Krzysztof Bieganski, Antmicro Ltd.] * Support appending to queue via `[]` (#5421). [Krzysztof Bieganski, Antmicro Ltd.]
* Support named event locals (#5422). [Krzysztof Bieganski, Antmicro Ltd.] * Support named event locals (#5422). [Krzysztof Bieganski, Antmicro Ltd.]
* Support basic dist constraints (#5431). [Arkadiusz Kozdra, Antmicro Ltd.] * Support basic dist constraints (#5431). [Arkadiusz Kozdra, Antmicro Ltd.]
* Support unpacked array constrained randomization (#5437) (#5489). [Yilou Wang]
* Support inside array constraints (#5448). [Arkadiusz Kozdra, Antmicro Ltd.] * Support inside array constraints (#5448). [Arkadiusz Kozdra, Antmicro Ltd.]
* Support DPI imports and exports with double underscores (#5481). * Support DPI imports and exports with double underscores (#5481).
* Support ccache when compiling Verilated files with cmake. * Support ccache when compiling Verilated files with cmake.
@ -43,6 +45,7 @@ Verilator 5.029 devel
* Improve process trigger performance (#5483). [Geza Lore] * Improve process trigger performance (#5483). [Geza Lore]
* Fix suppression of WIDTH* warnings when immediately under a size cast (#3417). * Fix suppression of WIDTH* warnings when immediately under a size cast (#3417).
* Fix `$fatal` to not be affected by `+verilator+error+limit` (#5135). [Gökçe Aydos] * Fix `$fatal` to not be affected by `+verilator+error+limit` (#5135). [Gökçe Aydos]
* Fix equivalence checking when replacing type parameters (#5213) (#5255). [Han Qi]
* Fix display with multiple string formats (#5311). [Luiza de Melo] * Fix display with multiple string formats (#5311). [Luiza de Melo]
* Fix performance of V3Trace when many activity blocks (#5372). [Deniz Güzel] * Fix performance of V3Trace when many activity blocks (#5372). [Deniz Güzel]
* Fix REALCVT warning on integral timescale conversions (#5378). [Liam Braun] * Fix REALCVT warning on integral timescale conversions (#5378). [Liam Braun]
@ -75,7 +78,10 @@ Verilator 5.029 devel
* Fix exponential concatenate performance (#5488). [Arkadiusz Kozdra, Antmicro Ltd.] * Fix exponential concatenate performance (#5488). [Arkadiusz Kozdra, Antmicro Ltd.]
* Fix V3Table trying to generate 'x' bits in the lookup table. (#5491). [Geza Lore] * Fix V3Table trying to generate 'x' bits in the lookup table. (#5491). [Geza Lore]
* Fix randomize with foreach constraints (#5492). [Arkadiusz Kozdra, Antmicro Ltd.] * Fix randomize with foreach constraints (#5492). [Arkadiusz Kozdra, Antmicro Ltd.]
* Fix explicit CMAKE_INSTALL_PREFIX usages (#5500). [Fabian Keßler]
* Fix configure inserting absolute paths for Python and Perl (#5504) (#5505). [Nathan Graybeal]
* Fix pattern initialization with typedef key (#5512). [Eugene Feinberg] * Fix pattern initialization with typedef key (#5512). [Eugene Feinberg]
* Fix -j option without argument in hierarchical Verilation (#5514). [Ryszard Rozak, Antmicro Ltd.]
Verilator 5.028 2024-08-21 Verilator 5.028 2024-08-21

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docs/guide/exe_verilator.rst
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@ -962,7 +962,7 @@ Summary:
Enables concatenating the output .cpp files into the given number of Enables concatenating the output .cpp files into the given number of
effective output .cpp files. This is useful if the compiler startup effective output .cpp files. This is useful if the compiler startup
overhead cumulated from compiling many small files becomes unacceptable, overhead from compiling many small files becomes unacceptable,
which can happen in designs making extensive use of SystemVerilog classes, which can happen in designs making extensive use of SystemVerilog classes,
templates or generate blocks. templates or generate blocks.

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docs/spelling.txt
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@ -110,6 +110,7 @@ Eugen
Fabrizio Fabrizio
Faucher Faucher
Faure Faure
Feinberg
Fekete Fekete
Ferrandi Ferrandi
Flachs Flachs
@ -936,6 +937,7 @@ redeclaring
regs regs
reloop reloop
replaceShiftOp replaceShiftOp
reproducibility
resetall resetall
respecified respecified
rodata rodata