From 2b58e834ee32daf19c27408d2f9679865ccc3ec7 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 23 Apr 2020 07:42:05 -0400
Subject: [PATCH] Tests: Rename IVERILOG define for consistency. No functional
 change.

---
 test_regress/driver.pl               | 2 +-
 test_regress/t/t_mem_packed.v        | 2 +-
 test_regress/t/t_vpi_get.v           | 4 ++--
 test_regress/t/t_vpi_memory.v        | 2 +-
 test_regress/t/t_vpi_module.v        | 2 +-
 test_regress/t/t_vpi_time_cb.pl      | 2 +-
 test_regress/t/t_vpi_time_cb.v       | 2 +-
 test_regress/t/t_vpi_var.v           | 4 ++--
 test_regress/t/t_vpi_zero_time_cb.pl | 2 +-
 test_regress/t/t_vpi_zero_time_cb.v  | 2 +-
 10 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/test_regress/driver.pl b/test_regress/driver.pl
index d523aac45..0010e3971 100755
--- a/test_regress/driver.pl
+++ b/test_regress/driver.pl
@@ -585,7 +585,7 @@ sub new {
         ghdl_run_flags => [],
         # IV
         iv => 0,
-        iv_flags => [split(/\s+/,"+define+iverilog -g2012 -o $self->{obj_dir}/simiv")],
+        iv_flags => [split(/\s+/,"+define+IVERILOG -g2012 -o $self->{obj_dir}/simiv")],
         iv_flags2 => [],  # Overridden in some sim files
         iv_pli => 0,  # need to use pli
         iv_run_flags => [],
diff --git a/test_regress/t/t_mem_packed.v b/test_regress/t/t_mem_packed.v
index 55ec2deca..52a38bf9d 100644
--- a/test_regress/t/t_mem_packed.v
+++ b/test_regress/t/t_mem_packed.v
@@ -18,7 +18,7 @@ module t (/*AUTOARG*/
    //logic [3:3] [2:2] [1:1] log_p; //14
 
    integer cyc; initial cyc = 0;
-`ifdef iverilog
+`ifdef IVERILOG
    reg [7:0] arr [3:0];
    wire [7:0] arr_w [3:0];
 `else
diff --git a/test_regress/t/t_vpi_get.v b/test_regress/t/t_vpi_get.v
index d6b120790..de893386b 100644
--- a/test_regress/t/t_vpi_get.v
+++ b/test_regress/t/t_vpi_get.v
@@ -43,7 +43,7 @@ extern "C" int mon_check();
 
    integer      status;
 
-`ifdef iverilog
+`ifdef IVERILOG
    // stop icarus optimizing signals away
    wire 	redundant = onebit | onetwo[1] | twoone | fourthreetwoone[3];
 `endif
@@ -57,7 +57,7 @@ extern "C" int mon_check();
 `ifdef VERILATOR
       status = $c32("mon_check()");
 `endif
-`ifdef iverilog
+`ifdef IVERILOG
      status = $mon_check();
 `endif
 `ifndef USE_VPI_NOT_DPI
diff --git a/test_regress/t/t_vpi_memory.v b/test_regress/t/t_vpi_memory.v
index f140f12e0..de2d2b4a7 100644
--- a/test_regress/t/t_vpi_memory.v
+++ b/test_regress/t/t_vpi_memory.v
@@ -33,7 +33,7 @@ extern "C" int mon_check();
 `ifdef VERILATOR
       status = $c32("mon_check()");
 `endif
-`ifdef iverilog
+`ifdef IVERILOG
      status = $mon_check();
 `endif
 `ifndef USE_VPI_NOT_DPI
diff --git a/test_regress/t/t_vpi_module.v b/test_regress/t/t_vpi_module.v
index f411143fd..e3490e5a4 100644
--- a/test_regress/t/t_vpi_module.v
+++ b/test_regress/t/t_vpi_module.v
@@ -42,7 +42,7 @@ extern "C" int mon_check();
 `ifdef VERILATOR
       status = $c32("mon_check()");
 `endif
-`ifdef iverilog
+`ifdef IVERILOG
      status = $mon_check();
 `endif
 `ifndef USE_VPI_NOT_DPI
diff --git a/test_regress/t/t_vpi_time_cb.pl b/test_regress/t/t_vpi_time_cb.pl
index 94c01d0cb..512dbb1b7 100755
--- a/test_regress/t/t_vpi_time_cb.pl
+++ b/test_regress/t/t_vpi_time_cb.pl
@@ -15,7 +15,7 @@ compile(
     make_main => 0,
     make_pli => 1,
     sim_time => 2100,
-    iv_flags2 => ["-g2005-sv -D USE_VPI_NOT_DPI -DWAVES -Diverilog"],
+    iv_flags2 => ["-g2005-sv -D USE_VPI_NOT_DPI -DWAVES -DIVERILOG"],
     v_flags2 => ["+define+USE_VPI_NOT_DPI"],
     verilator_flags2 => ["-CFLAGS '-DVL_DEBUG -ggdb' --exe --vpi --no-l2name $Self->{t_dir}/t_vpi_time_cb.cpp -LDFLAGS '-ldl -rdynamic'"],
     );
diff --git a/test_regress/t/t_vpi_time_cb.v b/test_regress/t/t_vpi_time_cb.v
index 96f5ba107..a2410c7c5 100644
--- a/test_regress/t/t_vpi_time_cb.v
+++ b/test_regress/t/t_vpi_time_cb.v
@@ -87,7 +87,7 @@ endmodule : t
 module sub;
    reg subsig1 /*verilator public_flat_rd*/;
    reg subsig2 /*verilator public_flat_rd*/;
-`ifdef iverilog
+`ifdef IVERILOG
    // stop icarus optimizing signals away
    wire redundant = subsig1 | subsig2;
 `endif
diff --git a/test_regress/t/t_vpi_var.v b/test_regress/t/t_vpi_var.v
index 74119a4dc..206b38584 100644
--- a/test_regress/t/t_vpi_var.v
+++ b/test_regress/t/t_vpi_var.v
@@ -57,7 +57,7 @@ extern "C" int mon_check();
 `ifdef VERILATOR
       status = $c32("mon_check()");
 `endif
-`ifdef iverilog
+`ifdef IVERILOG
      status = $mon_check();
 `endif
 `ifndef USE_VPI_NOT_DPI
@@ -100,7 +100,7 @@ endmodule : t
 module sub;
    reg subsig1 /*verilator public_flat_rd*/;
    reg subsig2 /*verilator public_flat_rd*/;
-`ifdef iverilog
+`ifdef IVERILOG
    // stop icarus optimizing signals away
    wire redundant = subsig1 | subsig2;
 `endif
diff --git a/test_regress/t/t_vpi_zero_time_cb.pl b/test_regress/t/t_vpi_zero_time_cb.pl
index 58239f1a7..717592491 100755
--- a/test_regress/t/t_vpi_zero_time_cb.pl
+++ b/test_regress/t/t_vpi_zero_time_cb.pl
@@ -15,7 +15,7 @@ compile(
     make_main => 0,
     make_pli => 1,
     sim_time => 2100,
-    iv_flags2 => ["-g2005-sv -D USE_VPI_NOT_DPI -DWAVES -Diverilog"],
+    iv_flags2 => ["-g2005-sv -D USE_VPI_NOT_DPI -DWAVES -DIVERILOG"],
     v_flags2 => ["+define+USE_VPI_NOT_DPI"],
     verilator_flags2 => ["-CFLAGS '-DVL_DEBUG -ggdb' --exe --vpi --no-l2name $Self->{t_dir}/t_vpi_zero_time_cb.cpp -LDFLAGS '-ldl -rdynamic'"],
     );
diff --git a/test_regress/t/t_vpi_zero_time_cb.v b/test_regress/t/t_vpi_zero_time_cb.v
index 052b9f4ba..f88aa8e8c 100644
--- a/test_regress/t/t_vpi_zero_time_cb.v
+++ b/test_regress/t/t_vpi_zero_time_cb.v
@@ -87,7 +87,7 @@ endmodule : t
 module sub;
    reg subsig1 /*verilator public_flat_rd*/;
    reg subsig2 /*verilator public_flat_rd*/;
-`ifdef iverilog
+`ifdef IVERILOG
    // stop icarus optimizing signals away
    wire redundant = subsig1 | subsig2;
 `endif