From 290b313dc058922aa46bb99eeec5a5bac920bd25 Mon Sep 17 00:00:00 2001 From: Andrew Nolte Date: Mon, 18 Mar 2024 20:47:28 -0400 Subject: [PATCH] Fix missing VPI scopes (#4918) --- src/V3EmitCSyms.cpp | 22 +++++++++++++++++----- test_regress/t/t_vpi_dump.iv.out | 18 +++++++++++++++++- test_regress/t/t_vpi_dump.out | 18 ++++++++++++++++++ test_regress/t/t_vpi_dump.v | 24 +++++++++++++++++------- 4 files changed, 69 insertions(+), 13 deletions(-) diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp index 9e7ece0a3..d5279167d 100644 --- a/src/V3EmitCSyms.cpp +++ b/src/V3EmitCSyms.cpp @@ -184,7 +184,15 @@ class EmitCSyms final : EmitCBaseVisitorConst { return out; } + /// (scp, m_vpiScopeCandidates, m_scopeNames) -> m_scopeNames + /// Look for parent scopes of scp in m_vpiScopeCandidates (separated by __DOT__ or ".") + /// Then add/update entry in m_scopeNames if not already there void varHierarchyScopes(string scp) { + + // we want no result to be -1, so use ints + string::size_type prd_pos = scp.rfind('.'); + string::size_type dot_pos = scp.rfind("__DOT__"); + while (!scp.empty()) { const auto scpit = m_vpiScopeCandidates.find(scopeSymString(scp)); if ((scpit != m_vpiScopeCandidates.end()) @@ -193,12 +201,16 @@ class EmitCSyms final : EmitCBaseVisitorConst { const auto pair = m_scopeNames.emplace(scpit->second.m_symName, scpit->second); if (!pair.second) pair.first->second.m_type = scpit->second.m_type; } - string::size_type pos = scp.rfind("__DOT__"); - if (pos == string::npos) { - pos = scp.rfind('.'); - if (pos == string::npos) break; + + // resize and advance pointers + if (prd_pos < dot_pos && dot_pos != string::npos) { + scp.resize(dot_pos); + dot_pos = scp.rfind("__DOT__"); + } else { + if (prd_pos == string::npos) break; + scp.resize(prd_pos); + prd_pos = scp.rfind('.'); } - scp.resize(pos); } } diff --git a/test_regress/t/t_vpi_dump.iv.out b/test_regress/t/t_vpi_dump.iv.out index 3e2ff3cb4..f6af5250d 100644 --- a/test_regress/t/t_vpi_dump.iv.out +++ b/test_regress/t/t_vpi_dump.iv.out @@ -53,6 +53,14 @@ t (vpiModule) t vpiReg: t.cond_scope.scoped_sub.subsig1 (vpiReg) t.cond_scope.scoped_sub.subsig1 t.cond_scope.scoped_sub.subsig2 (vpiReg) t.cond_scope.scoped_sub.subsig2 + t.cond_scope.sub_wrap_gen (vpiModule) t.cond_scope.sub_wrap_gen + vpiInternalScope: + t.cond_scope.sub_wrap_gen.my_sub (vpiModule) t.cond_scope.sub_wrap_gen.my_sub + vpiNet: + t.cond_scope.sub_wrap_gen.my_sub.redundant (vpiNet) t.cond_scope.sub_wrap_gen.my_sub.redundant + vpiReg: + t.cond_scope.sub_wrap_gen.my_sub.subsig1 (vpiReg) t.cond_scope.sub_wrap_gen.my_sub.subsig1 + t.cond_scope.sub_wrap_gen.my_sub.subsig2 (vpiReg) t.cond_scope.sub_wrap_gen.my_sub.subsig2 t.intf_arr[0] (vpiModule) t.intf_arr[0] t.intf_arr[1] (vpiModule) t.intf_arr[1] t.outer_scope[1] (vpiGenScope) t.outer_scope[1] @@ -226,5 +234,13 @@ t (vpiModule) t vpiReg: t.sub.subsig1 (vpiReg) t.sub.subsig1 t.sub.subsig2 (vpiReg) t.sub.subsig2 + t.sub_wrap (vpiModule) t.sub_wrap + vpiInternalScope: + t.sub_wrap.my_sub (vpiModule) t.sub_wrap.my_sub + vpiNet: + t.sub_wrap.my_sub.redundant (vpiNet) t.sub_wrap.my_sub.redundant + vpiReg: + t.sub_wrap.my_sub.subsig1 (vpiReg) t.sub_wrap.my_sub.subsig1 + t.sub_wrap.my_sub.subsig2 (vpiReg) t.sub_wrap.my_sub.subsig2 *-* All Finished *-* -t/t_vpi_dump.v:75: $finish called at 0 (1s) +t/t_vpi_dump.v:76: $finish called at 0 (1s) diff --git a/test_regress/t/t_vpi_dump.out b/test_regress/t/t_vpi_dump.out index bff9ef447..a100566d1 100644 --- a/test_regress/t/t_vpi_dump.out +++ b/test_regress/t/t_vpi_dump.out @@ -78,6 +78,15 @@ t (vpiModule) t subsig1 (vpiReg) t.cond_scope.scoped_sub.subsig1 subsig2 (vpiReg) t.cond_scope.scoped_sub.subsig2 vpiParameter: + sub_wrap_gen (vpiModule) t.cond_scope.sub_wrap_gen + vpiReg: + vpiParameter: + vpiInternalScope: + my_sub (vpiModule) t.cond_scope.sub_wrap_gen.my_sub + vpiReg: + subsig1 (vpiReg) t.cond_scope.sub_wrap_gen.my_sub.subsig1 + subsig2 (vpiReg) t.cond_scope.sub_wrap_gen.my_sub.subsig2 + vpiParameter: intf_arr[0] (vpiModule) t.intf_arr[0] vpiReg: addr (vpiReg) t.intf_arr[0].addr @@ -286,4 +295,13 @@ t (vpiModule) t subsig1 (vpiReg) t.sub.subsig1 subsig2 (vpiReg) t.sub.subsig2 vpiParameter: + sub_wrap (vpiModule) t.sub_wrap + vpiReg: + vpiParameter: + vpiInternalScope: + my_sub (vpiModule) t.sub_wrap.my_sub + vpiReg: + subsig1 (vpiReg) t.sub_wrap.my_sub.subsig1 + subsig2 (vpiReg) t.sub_wrap.my_sub.subsig2 + vpiParameter: *-* All Finished *-* diff --git a/test_regress/t/t_vpi_dump.v b/test_regress/t/t_vpi_dump.v index 7b7305538..9a4600458 100644 --- a/test_regress/t/t_vpi_dump.v +++ b/test_regress/t/t_vpi_dump.v @@ -6,6 +6,7 @@ // Version 2.0. // SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 +/* verilator public_on */ typedef struct packed { logic [3:0][7:0] adr; // address @@ -95,15 +96,19 @@ module t ( /*AUTOARG*/ end endgenerate + sub_wrapper sub_wrap (); - if (do_generate == 1) begin : cond_scope - sub scoped_sub (); - parameter int scoped_wire = 1; - end else begin : cond_scope_else - sub scoped_sub (); - parameter int scoped_wire = 2; - end + generate + if (do_generate == 1) begin : cond_scope + sub scoped_sub (); + parameter int scoped_wire = 1; + + sub_wrapper sub_wrap_gen (); + end else begin : cond_scope_else + sub scoped_sub_else (); + end + endgenerate endmodule : t @@ -138,3 +143,8 @@ module arr; end endmodule : arr + + +module sub_wrapper; + sub my_sub (); +endmodule