diff --git a/Changes b/Changes
index 5ff7557ed..2095c0bad 100644
--- a/Changes
+++ b/Changes
@@ -8,6 +8,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 ****  Fix SystemC compiles with VPI, bug1081. [Arthur Kahlich]
 
+****  Fix error on wide numbers that represent small msb/lsb, msg1991. [Mandy Xu]
+
 
 * Verilator 3.886 2016-07-30
 
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 3f741e97c..fadbd91d9 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -605,7 +605,10 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const {
 
 uint32_t V3Number::toUInt() const {
     UASSERT(!isFourState(),"toUInt with 4-state "<<*this);
-    UASSERT((width()<33 || (width()<65 && m_value[1]==0)), "Value too wide "<<*this);
+    // We allow wide numbers that represent values <= 32 bits
+    for (int i=1; i<words(); ++i) {
+	UASSERT(!m_value[i], "Value too wide for 32-bits expected in this context "<<*this);
+    }
     return m_value[0];
 }
 
@@ -636,7 +639,10 @@ vlsint32_t V3Number::toSInt() const {
 
 vluint64_t V3Number::toUQuad() const {
     UASSERT(!isFourState(),"toUQuad with 4-state "<<*this);
-    UASSERT(width()<65, "Value too wide "<<*this);
+    // We allow wide numbers that represent values <= 64 bits
+    for (int i=2; i<words(); ++i) {
+	UASSERT(!m_value[i], "Value too wide for 64-bits expected in this context "<<*this);
+    }
     if (width()<=32) return ((vluint64_t)(toUInt()));
     return ((vluint64_t)m_value[1]<<VL_ULL(32)) | ((vluint64_t)m_value[0]);
 }
diff --git a/test_regress/t/t_param_wide_io.pl b/test_regress/t/t_param_wide_io.pl
new file mode 100755
index 000000000..b12dfcc0c
--- /dev/null
+++ b/test_regress/t/t_param_wide_io.pl
@@ -0,0 +1,16 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    );
+
+#execute ();
+
+ok(1);
+1;
diff --git a/test_regress/t/t_param_wide_io.v b/test_regress/t/t_param_wide_io.v
new file mode 100644
index 000000000..cf872736e
--- /dev/null
+++ b/test_regress/t/t_param_wide_io.v
@@ -0,0 +1,19 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2016 by Wilson Snyder.
+
+// issue 1991
+
+module t
+  #(
+    parameter[96:0] P = 97'h12344321_12344321_12344327
+    )
+   (	
+	input [P&7 - 1:0]  in,
+	output [P&7 - 1:0] out
+	);
+   
+   wire out = in;
+
+endmodule