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https://github.com/verilator/verilator.git
synced 2025-05-02 05:26:53 +00:00
Fix bit reductions on multi-packed dimensions, bug227
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
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2
Changes
@ -13,6 +13,8 @@ indicates the contributor was also the author of the fix; Thanks!
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**** Report errors when extra underscores used in meta-comments.
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**** Fix bit reductions on multi-packed dimensions, bug227. [by Bryon Bradley]
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**** Fix "make install" with configure outside srcdir. [Stefan Wallentowitz]
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**** Fix trace files with empty modules crashing some viewers.
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161
src/V3Slice.cpp
161
src/V3Slice.cpp
@ -54,6 +54,14 @@ class SliceCloneVisitor : public AstNVisitor {
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// AstArraySel::user1p() -> AstVarRef. The VarRef that the final ArraySel points to
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// AstNodeAssign::user2() -> int. The number of clones needed for this assign
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// ENUMS
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enum RedOp { // The type of unary operation to be expanded
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REDOP_UNKNOWN, // Unknown/Unsupported
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REDOP_OR, // Or Reduction
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REDOP_AND, // And Reduction
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REDOP_XOR, // Xor Reduction
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REDOP_XNOR}; // Xnor Reduction
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// STATE
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vector<vector<unsigned> > m_selBits; // Indexes of the ArraySel we are expanding
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int m_vecIdx; // Current vector index
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@ -78,7 +86,7 @@ class SliceCloneVisitor : public AstNVisitor {
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AstVar* varp = m_refp->varp();
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pair<uint32_t,uint32_t> arrDim = varp->dimensions();
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uint32_t dimensions = arrDim.first + arrDim.second;
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for (int i = 0; i < dimensions; ++i) {
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for (uint32_t i = 0; i < dimensions; ++i) {
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m_selBits[m_vecIdx].push_back(0);
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}
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}
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@ -113,6 +121,7 @@ class SliceCloneVisitor : public AstNVisitor {
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}
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virtual void visit(AstNodeAssign* nodep, AstNUser*) {
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if (nodep->user2() < 2) return; // Don't need clones
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m_selBits.clear();
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UINFO(4, "Cloning "<<nodep->user2()<<" times: "<<nodep<<endl);
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for (int i = 0; i < nodep->user2(); ++i) {
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@ -125,13 +134,60 @@ class SliceCloneVisitor : public AstNVisitor {
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nodep->unlinkFrBack()->deleteTree(); nodep = NULL;
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}
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virtual void visit(AstNodeUniop* nodep, AstNUser*) {
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if (nodep->user2() < 2) return; // Don't need clones
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m_selBits.clear();
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UINFO(4, "Cloning "<<nodep->user2()<<" times: "<<nodep<<endl);
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// Figure out what type of operation this is so we don't have to cast on
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// every clone.
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RedOp redOpType = REDOP_UNKNOWN;
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if (nodep->castRedOr()) redOpType = REDOP_OR;
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else if (nodep->castRedAnd()) redOpType = REDOP_AND;
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else if (nodep->castRedXor()) redOpType = REDOP_XOR;
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else if (nodep->castRedXnor()) redOpType = REDOP_XNOR;
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AstNode* lhsp = NULL;
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AstNode* rhsp = NULL;
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for (int i = 0; i < nodep->user2(); ++i) {
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// Clone the node and iterate over the clone
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m_vecIdx = -1;
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AstNodeUniop* clonep = nodep->cloneTree(false)->castNodeUniop();
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clonep->iterateChildren(*this);
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if (!lhsp) lhsp = clonep;
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else rhsp = clonep;
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if (lhsp && rhsp) {
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switch (redOpType) {
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case REDOP_OR:
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lhsp = new AstLogOr(nodep->fileline(), lhsp, rhsp);
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break;
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case REDOP_AND:
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lhsp = new AstLogAnd(nodep->fileline(), lhsp, rhsp);
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break;
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case REDOP_XOR:
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lhsp = new AstXor(nodep->fileline(), lhsp, rhsp);
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break;
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case REDOP_XNOR:
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lhsp = new AstXnor(nodep->fileline(), lhsp, rhsp);
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break;
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default: // REDOP_UNKNOWN
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nodep->v3fatalSrc("Unsupported: Unary operation on multiple packed dimensions");
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break;
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}
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rhsp = NULL;
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}
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}
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nodep->addNextHere(lhsp);
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nodep->unlinkFrBack()->deleteTree(); nodep = NULL;
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}
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virtual void visit(AstNode* nodep, AstNUser*) {
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// Default: Just iterate
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nodep->iterateChildren(*this);
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}
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public:
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// CONSTUCTORS
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SliceCloneVisitor(AstNodeAssign* assignp) {
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SliceCloneVisitor(AstNode* assignp) {
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assignp->accept(*this);
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}
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virtual ~SliceCloneVisitor() {}
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@ -143,11 +199,15 @@ class SliceVisitor : public AstNVisitor {
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// NODE STATE
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// Cleared on netlist
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// AstNodeAssign::user1() -> bool. True if find is complete
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// AstNodeAssign::user2() -> int. The number of clones needed for this assign
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// AstUniop::user1() -> bool. True if find is complete
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// AstArraySel::user1p() -> AstVarRef. The VarRef that the final ArraySel points to
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// AstNode::user2() -> int. The number of clones needed for this node
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AstUser1InUse m_inuser1;
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AstUser2InUse m_inuser2;
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// TYPEDEFS
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typedef pair<uint32_t, uint32_t> ArrayDimensions; // Array Dimensions (packed, unpacked)
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// STATE
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AstNode* m_assignp; // Assignment we are under
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AstNodeVarRef* m_lhsVarRefp; // Var on the LHS
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@ -180,15 +240,13 @@ class SliceVisitor : public AstNVisitor {
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return dim;
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}
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AstNode* insertImplicit(AstVarRef* nodep, unsigned start, unsigned count) {
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AstArraySel* insertImplicit(AstNode* nodep, unsigned start, unsigned count) {
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// Insert any implicit slices as explicit slices (ArraySel nodes).
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// Return a new pointer to replace fromp() in the ArraySel.
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AstVarRef* fromp = nodep;
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if (!fromp) nodep->v3fatalSrc("NULL VarRef passed to insertImplicit");
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AstVar* varp = fromp->varp();
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// Get the DType and insert a new ArraySel
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AstArraySel* topp = NULL;
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AstArraySel* bottomp = NULL;
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// Return a new pointer to replace nodep() in the ArraySel.
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AstVarRef* refp = nodep->user1p()->castNode()->castVarRef();
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if (!refp) nodep->v3fatalSrc("No VarRef in user1 of node "<<nodep);
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AstVar* varp = refp->varp();
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AstNode* topp = nodep;
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for (unsigned i = start; i < start + count; ++i) {
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AstNodeDType* dtypep = varp->dtypeDimensionp(i-1);
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AstArrayDType* adtypep = dtypep->castArrayDType();
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@ -199,17 +257,13 @@ class SliceVisitor : public AstNVisitor {
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// Below code assumes big bit endian; just works out if we swap
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int x = msb; msb = lsb; lsb = x;
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}
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AstArraySel* newp = new AstArraySel(nodep->fileline(), fromp, new AstConst(nodep->fileline(),lsb));
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AstArraySel* newp = new AstArraySel(nodep->fileline(), topp, new AstConst(nodep->fileline(),lsb));
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newp->user1p(refp);
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newp->start(lsb);
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newp->length(msb - lsb + 1);
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if (!topp) topp = newp;
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fromp = newp->fromp()->unlinkFrBack()->castVarRef();
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if (bottomp) bottomp->fromp(newp);
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bottomp = newp;
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topp = newp->castNode();
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}
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bottomp->fromp(fromp);
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return topp;
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return topp->castArraySel();
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}
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int countClones(AstArraySel* nodep) {
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@ -233,7 +287,9 @@ class SliceVisitor : public AstNVisitor {
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pair<uint32_t,uint32_t> arrDim = nodep->varp()->dimensions();
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uint32_t dimensions = arrDim.first + arrDim.second;
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if (dimensions > 0) {
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AstNode* newp = insertImplicit(nodep->cloneTree(false), 1, dimensions);
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AstVarRef* clonep = nodep->cloneTree(false);
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clonep->user1p(nodep);
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AstNode* newp = insertImplicit(clonep, 1, dimensions);
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nodep->replaceWith(newp); nodep = NULL;
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newp->accept(*this);
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}
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@ -265,9 +321,8 @@ class SliceVisitor : public AstNVisitor {
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pair<uint32_t,uint32_t> arrDim = refp->varp()->dimensions();
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uint32_t implicit = (arrDim.first + arrDim.second) - dim;
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if (implicit > 0) {
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AstNode* backp = refp->backp();
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AstNode* newp = insertImplicit(refp->cloneTree(false), dim+1, implicit);
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backp->castArraySel()->fromp()->replaceWith(newp);
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AstArraySel* newp = insertImplicit(nodep->cloneTree(false), dim+1, implicit);
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nodep->replaceWith(newp); nodep = newp;
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}
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int clones = countClones(nodep);
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if (m_assignp->user2() > 0 && m_assignp->user2() != clones) {
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@ -340,9 +395,7 @@ class SliceVisitor : public AstNVisitor {
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// Iterate children looking for ArraySel nodes. From that we get the number of elements
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// in the array so we know how many times we need to clone this assignment.
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nodep->iterateChildren(*this);
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if (nodep->user2() > 1) {
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SliceCloneVisitor scv(nodep);
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}
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if (nodep->user2() > 1) SliceCloneVisitor scv(nodep);
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m_assignp = NULL;
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}
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@ -353,6 +406,60 @@ class SliceVisitor : public AstNVisitor {
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}
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}
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void expandUniOp(AstNodeUniop* nodep) {
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nodep->user1(true);
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unsigned dim = 0;
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if (AstArraySel* selp = nodep->lhsp()->castArraySel()) {
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// We have explicit dimensions, either packed or unpacked
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dim = explicitDimensions(selp);
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}
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if (dim == 0 && !nodep->lhsp()->castVarRef()) {
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// No ArraySel or VarRef, not something we can expand
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nodep->iterateChildren(*this);
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} else {
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AstVarRef* refp = findVarRefRecurse(nodep->lhsp());
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ArrayDimensions varDim = refp->varp()->dimensions();
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if ((int)(dim - varDim.second) < 0) {
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// Unpacked dimensions are referenced first, make sure we have them all
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nodep->v3error("Unary operator used across unpacked dimensions");
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} else if ((int)(dim - (varDim.first + varDim.second)) < 0) {
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// Implicit packed dimensions are allowed, make them explicit
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uint32_t newDim = (varDim.first + varDim.second) - dim;
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AstNode* clonep = nodep->lhsp()->cloneTree(false);
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clonep->user1p(refp);
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AstNode* newp = insertImplicit(clonep, dim+1, newDim);
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nodep->lhsp()->replaceWith(newp); refp = NULL;
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int clones = countClones(nodep->lhsp()->castArraySel());
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nodep->user2(clones);
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SliceCloneVisitor scv(nodep);
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}
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}
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}
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virtual void visit(AstRedOr* nodep, AstNUser*) {
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if (!nodep->user1()) {
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expandUniOp(nodep);
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}
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}
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virtual void visit(AstRedAnd* nodep, AstNUser*) {
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if (!nodep->user1()) {
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expandUniOp(nodep);
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}
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}
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virtual void visit(AstRedXor* nodep, AstNUser*) {
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if (!nodep->user1()) {
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expandUniOp(nodep);
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}
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}
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virtual void visit(AstRedXnor* nodep, AstNUser*) {
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if (!nodep->user1()) {
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expandUniOp(nodep);
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}
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}
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virtual void visit(AstNode* nodep, AstNUser*) {
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// Default: Just iterate
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nodep->iterateChildren(*this);
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@ -372,6 +479,6 @@ public:
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// Link class functions
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void V3Slice::sliceAll(AstNetlist* rootp) {
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UINFO(4,__FUNCTION__<<": "<<endl);
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UINFO(2,__FUNCTION__<<": "<<endl);
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SliceVisitor visitor(rootp);
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}
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@ -91,4 +91,78 @@ module t (/*AUTOARG*/
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end
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end
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// Test for mixed implicit/explicit dimensions and all implicit packed
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logic [3:0][7:0][1:0] vld [1:0][1:0];
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logic [3:0][7:0][1:0] vld2;
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// There are specific nodes for Or, Xor, Xnor and And
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logic vld_or;
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logic vld2_or;
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assign vld_or = |vld[0][0];
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assign vld2_or = |vld2;
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logic vld_xor;
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logic vld2_xor;
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assign vld_xor = ^vld[0][0];
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assign vld2_xor = ^vld2;
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logic vld_xnor;
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logic vld2_xnor;
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assign vld_xnor = ~^vld[0][0];
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assign vld2_xnor = ~^vld2;
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logic vld_and;
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logic vld2_and;
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assign vld_and = &vld[0][0];
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assign vld2_and = &vld2;
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// Test an AstNodeUniop that shouldn't be expanded
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logic [3:0][7:0][1:0] vld2_inv;
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assign vld2_inv = ~vld2;
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initial begin
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for (int i=0; i<4; i=i+2) begin
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for (int j=0; j<8; j=j+2) begin
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vld[0][0][i][j] = 2'b00;
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vld[0][0][i+1][j+1] = 2'b00;
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vld2[i][j] = 2'b00;
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vld2[i+1][j+1] = 2'b00;
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end
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end
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end
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logic [3:0] expect_cyc; initial expect_cyc = 'd15;
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always @(posedge clk) begin
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expect_cyc <= expect_cyc + 1;
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for (int i=0; i<4; i=i+1) begin
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for (int j=0; j<8; j=j+1) begin
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vld[0][0][i][j] <= vld[0][0][i][j] + 1;
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vld2[i][j] <= vld2[i][j] + 1;
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end
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end
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if (cyc % 8 == 0) begin
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vld[0][0][0][0] <= vld[0][0][0][0] - 1;
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vld2[0][0] <= vld2[0][0] - 1;
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end
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if (expect_cyc < 8 && !vld_xor) $stop;
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else if (expect_cyc > 7 && vld_xor) $stop;
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if (expect_cyc < 8 && vld_xnor) $stop;
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else if (expect_cyc > 7 && !vld_xnor) $stop;
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if (expect_cyc == 15 && vld_or) $stop;
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else if (expect_cyc == 11 && vld_or) $stop;
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else if (expect_cyc != 15 && expect_cyc != 11 && !vld_or) $stop;
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if (expect_cyc == 10 && !vld_and) $stop;
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else if (expect_cyc == 14 && !vld_and) $stop;
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else if (expect_cyc != 10 && expect_cyc != 14 && vld_and) $stop;
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if (vld_xor != vld2_xor) $stop;
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if (vld_xnor != vld2_xnor) $stop;
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if (vld_or != vld2_or) $stop;
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if (vld_and != vld2_and) $stop;
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end
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endmodule
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