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Fix loss of warning source content with `line enter (due to earlier commit 472ad90d83
).
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parent
7ce0bd1181
commit
1fd8e772b0
@ -210,6 +210,7 @@ public:
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lineno(num);
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m_contentLineno = static_cast<unsigned>(num);
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}
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void contentLinenoFrom(const FileLine* fromp) { m_contentLineno = fromp->m_contentLineno; }
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void lineno(int num) {
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m_firstLineno = num;
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m_lastLineno = num;
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@ -85,8 +85,11 @@ void V3ParseImp::lexPpline(const char* textp) {
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lexFileline(newFl);
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lexFileline()->parent(prevFl);
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} else if (enterExit == 2) { // Exit
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const FileLine* const prevFl = lexFileline();
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if (FileLine* upFl = lexFileline()->parent()) {
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lexFileline(upFl); // Restore warning state to upper file
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// Must copy upFl as may be existing nodes that use the FileLine value
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lexFileline(new FileLine{upFl}); // Restore warning state to upper file
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lexFileline()->contentLinenoFrom(prevFl);
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}
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}
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if (enterExit != -1) { // Line/fn change
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@ -1,5 +1,7 @@
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%Warning-WIDTHTRUNC: t/t_lint_warn_incfile2_bad.v:13:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
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: ... note: In instance 't'
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13 | int warn_t = 64'h1;
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| ^~~~~
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... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
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... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
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%Error: Exiting due to
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7
test_regress/t/t_lint_warn_line_bad.out
Normal file
7
test_regress/t/t_lint_warn_line_bad.out
Normal file
@ -0,0 +1,7 @@
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%Warning-WIDTHTRUNC: the_line_file:13:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
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: ... note: In instance 't'
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13 | int warn_t = 64'h1;
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| ^~~~~
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... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
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... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
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%Error: Exiting due to
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22
test_regress/t/t_lint_warn_line_bad.pl
Executable file
22
test_regress/t/t_lint_warn_line_bad.pl
Executable file
@ -0,0 +1,22 @@
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#!/usr/bin/env perl
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if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2008 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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scenarios(vlt => 1);
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lint(
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# See also t/t_lint_warn_incfile1_bad
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# See also t/t_vlt_warn_file_bad
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verilator_flags2 => ["--no-std"],
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fails => 1,
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expect_filename => $Self->{golden_filename},
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);
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ok(1);
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1;
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14
test_regress/t/t_lint_warn_line_bad.v
Normal file
14
test_regress/t/t_lint_warn_line_bad.v
Normal file
@ -0,0 +1,14 @@
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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// Check that `line `__LINE__ still shows proper warning context
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`line `__LINE__ "the_line_file" 1
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`line `__LINE__ "the_line_file" 2
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module t;
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int warn_t = 64'h1; // Not suppressed - should warn
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endmodule
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@ -1,5 +1,7 @@
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%Warning-WIDTHTRUNC: t/t_vlt_warn_file_bad.v:11:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
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: ... note: In instance 't'
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11 | int warn_t = 64'h1;
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| ^~~~~
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... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
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... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
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%Error: Exiting due to
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