From 1bcaaa0f0d3294c9ef6423029fedc93c3f1c2ce1 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 15 Mar 2018 23:19:43 -0400 Subject: [PATCH] Internals: Cleanup V3Inst unused argument. No functional change intended. --- src/V3Inline.cpp | 2 +- src/V3Inst.cpp | 13 +++++++------ src/V3Inst.h | 2 +- src/V3Scope.cpp | 8 +++++--- src/V3Tristate.cpp | 8 ++++---- 5 files changed, 18 insertions(+), 15 deletions(-) diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp index 3306af082..a35f78528 100644 --- a/src/V3Inline.cpp +++ b/src/V3Inline.cpp @@ -534,7 +534,7 @@ private: // this loop as it clone()s itself. for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) { if (!pinp->exprp()) continue; - V3Inst::pinReconnectSimple(pinp, nodep, m_modp, false); + V3Inst::pinReconnectSimple(pinp, nodep, false); } // Clone original module diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp index 824f95c4d..0fdb11de1 100644 --- a/src/V3Inst.cpp +++ b/src/V3Inst.cpp @@ -86,9 +86,9 @@ private: // Use user1p on the PIN to indicate we created an assign for this pin if (!nodep->user1SetOnce()) { // Simplify it - V3Inst::pinReconnectSimple(nodep, m_cellp, m_modp, false); - // Make a ASSIGNW (expr, pin) - AstNode* exprp = nodep->exprp()->cloneTree(false); + V3Inst::pinReconnectSimple(nodep, m_cellp, false); + // Make an ASSIGNW (expr, pin) + AstNode* exprp = nodep->exprp()->cloneTree(false); if (exprp->width() != nodep->modVarp()->width()) nodep->v3fatalSrc("Width mismatch, should have been handled in pinReconnectSimple"); if (nodep->modVarp()->isInout()) { @@ -133,6 +133,7 @@ private: } // Save some time + virtual void visit(AstNodeMath*) {} virtual void visit(AstNodeAssign*) {} virtual void visit(AstAlways*) {} @@ -496,7 +497,7 @@ private: } public: - static AstAssignW* pinReconnectSimple(AstPin* pinp, AstCell* cellp, AstNodeModule*, + static AstAssignW* pinReconnectSimple(AstPin* pinp, AstCell* cellp, bool forTristate, bool alwaysCvt) { // If a pin connection is "simple" leave it as-is // Else create a intermediate wire to perform the interconnect @@ -573,9 +574,9 @@ public: //###################################################################### // Inst class functions -AstAssignW* V3Inst::pinReconnectSimple(AstPin* pinp, AstCell* cellp, AstNodeModule* modp, +AstAssignW* V3Inst::pinReconnectSimple(AstPin* pinp, AstCell* cellp, bool forTristate, bool alwaysCvt) { - return InstStatic::pinReconnectSimple(pinp, cellp, modp, forTristate, alwaysCvt); + return InstStatic::pinReconnectSimple(pinp, cellp, forTristate, alwaysCvt); } //###################################################################### diff --git a/src/V3Inst.h b/src/V3Inst.h index e0b09c716..57700f3d0 100644 --- a/src/V3Inst.h +++ b/src/V3Inst.h @@ -31,7 +31,7 @@ class V3Inst { public: static void instAll(AstNetlist* nodep); static void dearrayAll(AstNetlist* nodep); - static AstAssignW* pinReconnectSimple(AstPin* nodep, AstCell* cellp, AstNodeModule* modp, + static AstAssignW* pinReconnectSimple(AstPin* nodep, AstCell* cellp, bool forTristate, bool alwaysCvt=false); }; diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp index ed6d6553c..7b89ebd76 100644 --- a/src/V3Scope.cpp +++ b/src/V3Scope.cpp @@ -33,6 +33,8 @@ #include #include #include +#include VL_INCLUDE_UNORDERED_MAP +#include VL_INCLUDE_UNORDERED_SET #include "V3Global.h" #include "V3Scope.h" @@ -50,9 +52,9 @@ private: AstUser2InUse m_inuser2; // TYPES - typedef map PackageScopeMap; - typedef map, AstVarScope*> VarScopeMap; - typedef set > VarRefScopeSet; + typedef vl_unordered_map PackageScopeMap; + typedef vl_unordered_map, AstVarScope*> VarScopeMap; + typedef vl_unordered_set > VarRefScopeSet; // STATE, inside processing a single module AstNodeModule* m_modp; // Current module diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp index b303fca5d..f81d1acf2 100644 --- a/src/V3Tristate.cpp +++ b/src/V3Tristate.cpp @@ -1066,7 +1066,7 @@ class TristateVisitor : public TristateBaseVisitor { if (!enModVarp) { if (nodep->exprp()) { // May have an output only that later connects to a tristate, so simplify now. - V3Inst::pinReconnectSimple(nodep, m_cellp, m_modp, false); + V3Inst::pinReconnectSimple(nodep, m_cellp, false); } iteratePinGuts(nodep); return; // No __en signals on this pin @@ -1092,7 +1092,7 @@ class TristateVisitor : public TristateBaseVisitor { } else if (inDeclProcessing) { // Not an input that was a converted tristate // Input only may have driver in underneath module which would stomp // the input value. So make a temporary connection. - AstAssignW* reAssignp = V3Inst::pinReconnectSimple(nodep, m_cellp, m_modp, true, true); + AstAssignW* reAssignp = V3Inst::pinReconnectSimple(nodep, m_cellp, true, true); UINFO(5,"Input pin buffering: "<lhsp()); } @@ -1146,7 +1146,7 @@ class TristateVisitor : public TristateBaseVisitor { TristatePinVisitor visitor (outexprp, m_tgraph, true); } if (debug()>=9) outpinp->dumpTree(cout,"-pin-opr: "); - outAssignp = V3Inst::pinReconnectSimple(outpinp, m_cellp, m_modp, true); // Note may change outpinp->exprp() + outAssignp = V3Inst::pinReconnectSimple(outpinp, m_cellp, true); // Note may change outpinp->exprp() if (debug()>=9) outpinp->dumpTree(cout,"-pin-out: "); if (debug()>=9 && outAssignp) outAssignp->dumpTree(cout,"-pin-out: "); // Must still iterate the outAssignp, as need to build output equation @@ -1154,7 +1154,7 @@ class TristateVisitor : public TristateBaseVisitor { // Existing pin becomes an input, and we mark each resulting signal as tristate TristatePinVisitor visitor (nodep->exprp(), m_tgraph, false); - AstNode* inAssignp = V3Inst::pinReconnectSimple(nodep, m_cellp, m_modp, true); // Note may change nodep->exprp() + AstNode* inAssignp = V3Inst::pinReconnectSimple(nodep, m_cellp, true); // Note may change nodep->exprp() if (debug()>=9) nodep->dumpTree(cout,"-pin-in: "); if (debug()>=9 && inAssignp) inAssignp->dumpTree(cout,"-pin-as: ");