diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index add634091..47c34b045 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -336,6 +336,7 @@ public:
         }
     }
     bool waive(V3ErrorCode code, const string& match) {
+        if (code.hardError()) return false;
         for (const auto& itr : m_waivers) {
             if ((code.isUnder(itr.first) || (itr.first == V3ErrorCode::I_LINT))
                 && VString::wildmatch(match, itr.second)) {
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index bbb6982bf..ac6cc65b5 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -53,25 +53,11 @@ V3ErrorCode::V3ErrorCode(const char* msgp) {
 //
 
 bool V3ErrorGuarded::isError(V3ErrorCode code, bool supp) VL_REQUIRES(m_mutex) {
-    if (supp) {
-        return false;
-    } else if (code == V3ErrorCode::USERINFO) {
-        return false;
-    } else if (code == V3ErrorCode::EC_INFO) {
-        return false;
-    } else if (code == V3ErrorCode::EC_FATAL) {
-        return true;
-    } else if (code == V3ErrorCode::EC_FATALEXIT) {
-        return true;
-    } else if (code == V3ErrorCode::EC_FATALSRC) {
-        return true;
-    } else if (code == V3ErrorCode::EC_ERROR) {
-        return true;
-    } else if (code < V3ErrorCode::EC_FIRST_WARN || pretendError(code)) {
-        return true;
-    } else {
-        return false;
-    }
+    if (code.hardError()) return true;
+    if (supp) return false;
+    if (code == V3ErrorCode::USERINFO || code == V3ErrorCode::EC_INFO) return false;
+    if (pretendError(code)) return true;
+    return false;
 }
 
 string V3ErrorGuarded::msgPrefix() VL_REQUIRES(m_mutex) {
@@ -180,7 +166,7 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
         }
         if (!m_describedEachWarn[m_errorCode] && !m_pretendError[m_errorCode]) {
             m_describedEachWarn[m_errorCode] = true;
-            if (m_errorCode >= V3ErrorCode::EC_FIRST_WARN && !m_describedWarnings) {
+            if (!m_errorCode.hardError() && !m_describedWarnings) {
                 m_describedWarnings = true;
                 std::cerr << warnMore() << "... Use \"/* verilator lint_off "
                           << m_errorCode.ascii()
diff --git a/src/V3Error.h b/src/V3Error.h
index 004a9caea..aa81fd5ba 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -226,6 +226,10 @@ public:
     }
     // Warnings that warn about nasty side effects
     bool dangerous() const VL_MT_SAFE { return (m_e == COMBDLY); }
+    // Insuppressible error codes that should always stop elaboration
+    bool hardError() const VL_MT_SAFE {
+        return (m_e != EC_INFO && m_e < V3ErrorCode::EC_FIRST_WARN);
+    }
     // Warnings we'll present to the user as errors
     // Later -Werror- options may make more of these.
     bool pretendError() const VL_MT_SAFE {
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 1dbde717e..138707039 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -371,7 +371,7 @@ bool FileLine::warnOff(const string& msg, bool flag) {
         return true;
     }
     const V3ErrorCode code{cmsg};
-    if (code < V3ErrorCode::EC_FIRST_WARN) {
+    if (code.hardError()) {
         return false;
     } else {
         warnOff(code, flag);
diff --git a/test_regress/t/t_vlt_match_error.v b/test_regress/t/t_vlt_match_error.v
new file mode 100644
index 000000000..762d1daf5
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2024 by Ethan Sifferman.
+// SPDX-License-Identifier: CC0-1.0
+
+module DECLFILENAME;
+    logic UNUSEDSIGNAL;
+    logic [0:1] ASCRANGE_UNDRIVEN;
+    always_comb begin
+        case (ASCRANGE_UNDRIVEN)
+            2'b0x: UNUSEDSIGNAL = 1;
+        endcase
+    end
+
+`ifdef T_VLT_MATCH_ERROR_1
+    import hi::*;
+`elsif T_VLT_MATCH_ERROR_2
+    initial $readmemh("", EC_ERROR);
+`elsif T_VLT_MATCH_ERROR_3
+    initial #1;
+`endif
+endmodule
diff --git a/test_regress/t/t_vlt_match_error.vlt b/test_regress/t/t_vlt_match_error.vlt
new file mode 100644
index 000000000..7b6aa8e7f
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error.vlt
@@ -0,0 +1,9 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2024 by Ethan Sifferman.
+// SPDX-License-Identifier: CC0-1.0
+
+`verilator_config
+
+lint_off -file "*/t_vlt_match_error.v" -match "*"
diff --git a/test_regress/t/t_vlt_match_error_1.out b/test_regress/t/t_vlt_match_error_1.out
new file mode 100644
index 000000000..ffd388fbb
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error_1.out
@@ -0,0 +1,8 @@
+%Error-PKGNODECL: t/t_vlt_match_error.v:17:12: Package/class 'hi' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
+   17 |     import hi::*;
+      |            ^~
+                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
+%Error: t/t_vlt_match_error.v:17:12: Importing from missing package 'hi'
+   17 |     import hi::*;
+      |            ^~
+%Error: Exiting due to
diff --git a/test_regress/t/t_vlt_match_error_1.pl b/test_regress/t/t_vlt_match_error_1.pl
new file mode 100755
index 000000000..7de7b8d1b
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error_1.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder and Ethan Sifferman. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+top_filename("t/t_vlt_match_error.v");
+
+lint(
+    verilator_flags2 => ["-DT_VLT_MATCH_ERROR_1 --lint-only -Wall t/t_vlt_match_error.v t/t_vlt_match_error.vlt"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_vlt_match_error_2.out b/test_regress/t/t_vlt_match_error_2.out
new file mode 100644
index 000000000..2bf33c6cc
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error_2.out
@@ -0,0 +1,4 @@
+%Error: t/t_vlt_match_error.v:19:27: Can't find definition of variable: 'EC_ERROR'
+   19 |     initial $readmemh("", EC_ERROR);
+      |                           ^~~~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_vlt_match_error_2.pl b/test_regress/t/t_vlt_match_error_2.pl
new file mode 100755
index 000000000..0e046489a
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error_2.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder and Ethan Sifferman. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+top_filename("t/t_vlt_match_error.v");
+
+lint(
+    verilator_flags2 => ["-DT_VLT_MATCH_ERROR_2 --lint-only -Wall t/t_vlt_match_error.v t/t_vlt_match_error.vlt"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_vlt_match_error_3.out b/test_regress/t/t_vlt_match_error_3.out
new file mode 100644
index 000000000..057fb9412
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error_3.out
@@ -0,0 +1,6 @@
+%Error-NEEDTIMINGOPT: t/t_vlt_match_error.v:21:13: Use --timing or --no-timing to specify how delays should be handled
+                                                 : ... note: In instance 'DECLFILENAME'
+   21 |     initial #1;
+      |             ^
+                      ... For error description see https://verilator.org/warn/NEEDTIMINGOPT?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_vlt_match_error_3.pl b/test_regress/t/t_vlt_match_error_3.pl
new file mode 100755
index 000000000..43093cc2e
--- /dev/null
+++ b/test_regress/t/t_vlt_match_error_3.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder and Ethan Sifferman. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+top_filename("t/t_vlt_match_error.v");
+
+lint(
+    verilator_flags2 => ["-DT_VLT_MATCH_ERROR_3 --lint-only -Wall t/t_vlt_match_error.v t/t_vlt_match_error.vlt"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;