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Show error code on non-generic errors; add TASKNSVAR
git-svn-id: file://localhost/svn/verilator/trunk/verilator@822 77ca24e4-aefa-0310-84f0-b9a241c72d87
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@ -407,7 +407,7 @@ compatibility.
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=item --psl
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Enable PSL parsing. Without this switch, psl meta-comments are ignored.
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Enable PSL parsing. Without this switch, PSL meta-comments are ignored.
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See the --assert flag to enable all assertions, and --coverage-user to
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enable functional coverage.
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@ -609,7 +609,7 @@ Then we convert the SystemPerl output to SystemC.
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$SYSTEMPERL/sp_preproc --preproc *.sp
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(You can also skip the above sp_preproc by getting pure SystemC from
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verilator by replacing the verilator --sp flag in the previous step with
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Verilator by replacing the verilator --sp flag in the previous step with
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-sc.)
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We then can compile it
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@ -938,7 +938,7 @@ call C++ functions from your Verilog code.
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String arguments will be put directly into the output C++ code. Expression
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arguments will have the code to evaluate the expression inserted. Thus to
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call a C++ function, $c("func(",a,")") will result in 'func(a)' in the
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output C++ code. For input arguments, rather then hardcoding variable
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output C++ code. For input arguments, rather then hard-coding variable
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names in the string $c("func(a)"), instead pass the variable as an
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expression $c("func(",a,")"). This will allow the call to work inside
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Verilog functions where the variable is flattened out, and also enable
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@ -1364,6 +1364,29 @@ Warns that the specified signal comes from multiple always blocks. This is
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often unsupported by synthesis tools, and is considered bad style. It will
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also cause longer runtimes due to reduced optimizations.
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=item TASKNSVAR
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Error when a call to a task or function has a output from that task tied to
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a non-simple signal. Instead connect the task output to a temporary signal
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of the appropriate width, and use that signal to set the appropriate
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expression as the next statement. For example:
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task foo; output sig; ... endtask
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always @* begin
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foo(bus_we_select_from[2]); // Will get TASKNSVAR error
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end
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Change this to:
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reg foo_temp_out;
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always @* begin
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foo(foo_temp_out);
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bus_we_select_from[2] = foo_temp_out;
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end
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Verilator doesn't do this conversion for you, as some more complicated
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cases would result in simulator mismatches.
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=item UNDRIVEN
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Warns that the specified signal is never sourced.
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@ -92,7 +92,7 @@ void FileLine::lineDirective(const char* textp) {
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bool FileLine::warnOff(const string& msg, bool flag) {
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V3ErrorCode code (msg.c_str());
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if (code == V3ErrorCode::ERROR) {
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if (code < V3ErrorCode::FIRST_WARN) {
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return false;
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} else {
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warnOff(code, flag);
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@ -203,8 +203,9 @@ void V3Error::abortIfErrors() {
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string V3Error::msgPrefix(V3ErrorCode code) {
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if (code==V3ErrorCode::SUPPRESS) return "-arning-suppressed: ";
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else if (code==V3ErrorCode::FATAL) return "%Error: ";
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else if (code==V3ErrorCode::ERROR
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|| s_pretendError[code]) return "%Error: ";
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else if (code==V3ErrorCode::ERROR) return "%Error: ";
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else if (code<V3ErrorCode::FIRST_WARN
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|| s_pretendError[code]) return "%Error-"+(string)code.ascii()+": ";
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else return "%Warning-"+(string)code.ascii()+": ";
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}
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@ -34,9 +34,12 @@ public:
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enum en {
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SUPPRESS, // Warning suppressed by user
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FATAL, // Kill the program
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ERROR, // Error out, can't suppress
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ERROR, // General error out, can't suppress
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// Error codes:
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TASKNSVAR, // Error: Task I/O not simple
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// Warning codes:
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FIRST_WARN, // Just a code so the program knows where to start warnings
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//
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BLKANDNBLK, // Blocked and non-blocking assignments to same variable
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CASEINCOMPLETE, // Case statement has missing values
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CASEOVERLAP, // Case statements overlap
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@ -67,6 +70,7 @@ public:
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const char* names[] = {
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// Leading spaces indicate it can't be disabled.
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" SUPPRESS", " FATAL", " ERROR",
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"TASKNSVAR",
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" FIRST_WARN",
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"BLKANDNBLK",
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"CASEINCOMPLETE", "CASEOVERLAP", "CASEX", "CMPCONST",
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@ -82,7 +86,7 @@ public:
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bool dangerous() const { return ( m_e==COMBDLY );};
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// Warnings we'll present to the user as errors
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// Later -Werror- options may make more of these.
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bool pretendError() const { return ( m_e==BLKANDNBLK || m_e==IMPURE );};
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bool pretendError() const { return ( m_e==BLKANDNBLK || m_e==IMPURE); };
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};
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inline bool operator== (V3ErrorCode lhs, V3ErrorCode rhs) { return (lhs.m_e == rhs.m_e); }
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inline bool operator== (V3ErrorCode lhs, V3ErrorCode::en rhs) { return (lhs.m_e == rhs); }
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@ -348,7 +348,7 @@ private:
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AstVarScope* localVscp = varrefp->varScopep(); if (!localVscp) varrefp->v3fatalSrc("Null var scope");
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portp->user2p(localVscp);
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} else {
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pinp->v3error("Unsupported: Function/task input argument is not simple variable");
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pinp->v3warn(TASKNSVAR,"Unsupported: Function/task input argument is not simple variable");
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}
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}
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else if (portp->isOutput() && outvscp) {
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@ -360,7 +360,7 @@ private:
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if (AstVarRef* varrefp = pinp->castVarRef()) {
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varrefp->lvalue(true);
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} else {
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pinp->v3error("Unsupported: Task output pin connected to non-variable");
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pinp->v3warn(TASKNSVAR,"Unsupported: Task output pin connected to non-variable");
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}
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// Even if it's referencing a varref, we still make a temporary
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// Else task(x,x,x) might produce incorrect results
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@ -436,7 +436,7 @@ private:
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if (pinp->castVarRef()) {
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// Connect to this exact variable
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} else {
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pinp->v3error("Unsupported: Function/task input argument is not simple variable");
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pinp->v3warn(TASKNSVAR,"Unsupported: Function/task input argument is not simple variable");
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}
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}
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else if (portp->isOutput()) {
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@ -445,7 +445,7 @@ private:
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if (AstVarRef* varrefp = pinp->castVarRef()) {
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varrefp->lvalue(true);
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} else {
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pinp->v3error("Unsupported: Task output pin connected to non-variable");
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pinp->v3warn(TASKNSVAR,"Unsupported: Task output pin connected to non-variable");
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}
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}
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}
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@ -39,7 +39,6 @@ module t (/*AUTOARG*/
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a <= 256'h0e17c88f3d5fe51a982646c8e2bd68c3e236ddfddddbdad20a48e039c9f395b8;
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divisor <= 61'h1238123771;
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a[60] <= 1'b0; divisor[60] <= 1'b0; // Unsigned
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//$display("FIX");
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if (qq!==61'h00000403ad81c0da) $stop;
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if (rq!==61'h00000000000090ec) $stop;
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if (qqs!==61'h00000403ad81c0da) $stop;
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