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Track verilog-perl: Add static keyword; track IEEE BNF
git-svn-id: file://localhost/svn/verilator/trunk/verilator@961 77ca24e4-aefa-0310-84f0-b9a241c72d87
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@ -324,6 +324,7 @@ escid \\[^ \t\f\r\n]+
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"always_latch" {yylval.fileline = CRELINE(); return yALWAYS;}
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"do" {yylval.fileline = CRELINE(); return yDO;}
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"final" {yylval.fileline = CRELINE(); return yFINAL;}
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"static" {yylval.fileline = CRELINE(); return ySTATIC;}
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/* Generic unsupported warnings */
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/* Note assert_strobe was in SystemVerilog 3.1, but removed for SystemVerilog 2005 */
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"alias" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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@ -391,7 +392,6 @@ escid \\[^ \t\f\r\n]+
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"shortint" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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"shortreal" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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"solve" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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"static" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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"string" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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"struct" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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"super" {yyerrorf("Unsupported: SystemVerilog 2005 reserved word not implemented: %s",yytext);}
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@ -127,11 +127,19 @@ class AstSenTree;
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}
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// Generic lexer tokens, for example a number
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// IEEE: real_number
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%token<cdouble> yaFLOATNUM "FLOATING-POINT NUMBER"
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%token<fileline> yaTIMINGSPEC "TIMING SPEC ELEMENT"
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%token<nump> yaINTNUM "INTEGER NUMBER"
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// IEEE: identifier, class_identifier, class_variable_identifier,
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// covergroup_variable_identifier, dynamic_array_variable_identifier,
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// enum_identifier, interface_identifier, interface_instance_identifier,
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// package_identifier, type_identifier, variable_identifier,
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%token<strp> yaID "IDENTIFIER"
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// IEEE: integral_number
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%token<nump> yaINTNUM "INTEGER NUMBER"
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// IEEE: string_literal
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%token<strp> yaSTRING "STRING"
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%token<fileline> yaTIMINGSPEC "TIMING SPEC ELEMENT"
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%token<strp> yaSCHDR "`systemc_header BLOCK"
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%token<strp> yaSCINT "`systemc_ctor BLOCK"
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@ -193,6 +201,7 @@ class AstSenTree;
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%token<fileline> ySCALARED "scalared"
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%token<fileline> ySIGNED "signed"
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%token<fileline> ySPECIFY "specify"
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%token<fileline> ySTATIC "static"
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%token<fileline> ySUPPLY0 "supply0"
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%token<fileline> ySUPPLY1 "supply1"
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%token<fileline> yTASK "task"
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@ -331,8 +340,8 @@ class AstSenTree;
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%type<cellp> instnameParen
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%type<pinp> cellpinList cellpinItList cellpinItemE instparamListE
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%type<nodep> defpList defpOne
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%type<sentreep> sensitivity
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%type<sentreep> sensitivityE
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%type<sentreep> eventControl
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%type<sentreep> eventControlE
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%type<senitemp> senList senitem senitemEdge senitemVar
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%type<nodep> stmtBlock stmtList stmt labeledStmt stateCaseForIf
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%type<nodep> assertStmt
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@ -459,24 +468,24 @@ regsigList: regsig { $$ = $1; }
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| regsigList ',' regsig { $$ = $1;$1->addNext($3); }
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;
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portV2kDecl: varRESET varInput varSignedE v2kNetDeclE regrangeE portV2kSig { $$ = $6; }
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| varRESET varInout varSignedE v2kNetDeclE regrangeE portV2kSig { $$ = $6; }
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| varRESET varOutput varSignedE v2kVarDeclE regrangeE portV2kSig { $$ = $6; }
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portV2kDecl: varRESET varInput signingE v2kNetDeclE regrangeE portV2kSig { $$ = $6; }
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| varRESET varInout signingE v2kNetDeclE regrangeE portV2kSig { $$ = $6; }
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| varRESET varOutput signingE v2kVarDeclE regrangeE portV2kSig { $$ = $6; }
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;
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ioDecl: varRESET varInput varSignedE v2kVarDeclE regrangeE sigList ';' { $$ = $6; }
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| varRESET varInout varSignedE v2kVarDeclE regrangeE sigList ';' { $$ = $6; }
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| varRESET varOutput varSignedE v2kVarDeclE regrangeE sigList ';' { $$ = $6; }
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ioDecl: varRESET varInput signingE v2kVarDeclE regrangeE sigList ';' { $$ = $6; }
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| varRESET varInout signingE v2kVarDeclE regrangeE sigList ';' { $$ = $6; }
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| varRESET varOutput signingE v2kVarDeclE regrangeE sigList ';' { $$ = $6; }
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;
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varDecl: varRESET varReg varSignedE regrangeE regsigList ';' { $$ = $5; }
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| varRESET varGParam varSignedE regrangeE paramList ';' { $$ = $5; }
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| varRESET varLParam varSignedE regrangeE paramList ';' { $$ = $5; }
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| varRESET varNet varSignedE delayrange netSigList ';' { $$ = $5; }
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| varRESET varGenVar varSignedE regsigList ';' { $$ = $4; }
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varDecl: varRESET varReg signingE regrangeE regsigList ';' { $$ = $5; }
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| varRESET varGParam signingE regrangeE paramList ';' { $$ = $5; }
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| varRESET varLParam signingE regrangeE paramList ';' { $$ = $5; }
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| varRESET varNet signingE delayrange netSigList ';' { $$ = $5; }
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| varRESET varGenVar signingE regsigList ';' { $$ = $4; }
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;
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modParDecl: varRESET varGParam varSignedE regrangeE param { $$ = $5; }
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modParDecl: varRESET varGParam signingE regrangeE param { $$ = $5; }
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;
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varRESET: /* empty */ { VARRESET(); }
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@ -503,7 +512,8 @@ varOutput: yOUTPUT { VARIO(OUTPUT); }
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varInout: yINOUT { VARIO(INOUT); }
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;
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varSignedE: /*empty*/ { }
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// IEEE: signing - plus empty
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signingE: /*empty*/ { }
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| ySIGNED { VARSIGNED(true); }
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| yUNSIGNED { VARSIGNED(false); }
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;
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@ -544,7 +554,7 @@ modItem: modOrGenItem { $$ = $1; }
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| ySPECIFY yENDSPECIFY { $$ = NULL; }
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;
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modOrGenItem: yALWAYS sensitivityE stmtBlock { $$ = new AstAlways($1,$2,$3); }
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modOrGenItem: yALWAYS eventControlE stmtBlock { $$ = new AstAlways($1,$2,$3); }
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| yFINAL stmtBlock { $$ = new AstFinal($1,$2); }
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| yINITIAL stmtBlock { $$ = new AstInitial($1,$2); }
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| yASSIGN delayE assignList ';' { $$ = $3; }
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@ -712,6 +722,7 @@ paramList: param { $$ = $1; }
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| paramList ',' param { $$ = $1; $1->addNext($3); }
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;
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// IEEE: list_of_defparam_assignments
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defpList: defpOne { $$ = $1; }
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| defpList ',' defpOne { $$ = $1->addNext($3); }
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;
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@ -756,19 +767,19 @@ cellpinItemE: /* empty: ',,' is legal */ { $$ = NULL; V3Parse::s_pinNum++; }
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;
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//************************************************
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// Sensitivity lists
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// EventControl lists
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sensitivityE: /* empty */ { $$ = NULL; }
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| sensitivity { $$ = $1; }
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eventControlE: /* empty */ { $$ = NULL; }
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| eventControl { $$ = $1; }
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//IEEE: event_control
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sensitivity: '@' '(' senList ')' { $$ = new AstSenTree($1,$3); }
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// IEEE: event_control
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eventControl: '@' '(' senList ')' { $$ = new AstSenTree($1,$3); }
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| '@' senitemVar { $$ = new AstSenTree($1,$2); } /* For events only */
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| '@' '(' '*' ')' { $$ = NULL; $2->v3error("Use @*. always @ (*) to be depreciated in Verilog 2005.\n"); }
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| '@' '*' { $$ = NULL; } /* Verilog 2001 */
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;
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//IEEE: event_expression - split over several
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// IEEE: event_expression - split over several
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senList: senitem { $$ = $1; }
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| senList yOR senitem { $$ = $1;$1->addNext($3); }
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| senList ',' senitem { $$ = $1;$1->addNext($3); } /* Verilog 2001 */
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@ -894,17 +905,19 @@ taskRef: idDotted { $$ = new AstTaskRef(CRELINE(),new AstParseRef($1->fileli
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funcRef: idDotted '(' exprList ')' { $$ = new AstFuncRef($2,new AstParseRef($1->fileline(), AstParseRefExp::FUNC, $1), $3); }
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;
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taskDecl: yTASK taskAutoE yaID funcGuts yENDTASK endLabelE
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taskDecl: yTASK lifetimeE yaID funcGuts yENDTASK endLabelE
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{ $$ = new AstTask ($1,*$3,$4);}
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;
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funcDecl: yFUNCTION taskAutoE funcTypeE yaID funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$4,$5,$3); }
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| yFUNCTION taskAutoE ySIGNED funcTypeE yaID funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$5,$6,$4); $$->isSigned(true); }
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| yFUNCTION taskAutoE funcTypeE yaID yVL_ISOLATE_ASSIGNMENTS funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$4,$6,$3); $$->attrIsolateAssign(true);}
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| yFUNCTION taskAutoE ySIGNED funcTypeE yaID yVL_ISOLATE_ASSIGNMENTS funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$5,$7,$4); $$->attrIsolateAssign(true); $$->isSigned(true); }
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funcDecl: yFUNCTION lifetimeE funcTypeE yaID funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$4,$5,$3); }
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| yFUNCTION lifetimeE ySIGNED funcTypeE yaID funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$5,$6,$4); $$->isSigned(true); }
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| yFUNCTION lifetimeE funcTypeE yaID yVL_ISOLATE_ASSIGNMENTS funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$4,$6,$3); $$->attrIsolateAssign(true);}
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| yFUNCTION lifetimeE ySIGNED funcTypeE yaID yVL_ISOLATE_ASSIGNMENTS funcGuts yENDFUNCTION endLabelE { $$ = new AstFunc ($1,*$5,$7,$4); $$->attrIsolateAssign(true); $$->isSigned(true); }
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;
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taskAutoE: /* empty */ { }
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// IEEE: lifetime - plus empty
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lifetimeE: /* empty */ { }
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| ySTATIC { $1->v3error("Unsupported: Static in this context\n"); }
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| yAUTOMATIC { }
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;
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