Fix user-type parameter overlap (#5469)

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Todd Strader 2024-09-20 14:29:31 -04:00 committed by GitHub
parent f0fb0b05ff
commit 1665d15d4d
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3 changed files with 97 additions and 0 deletions

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@ -348,7 +348,24 @@ class ParamProcessor final {
if (dtypep->isRanged()) {
key += "[" + cvtToStr(dtypep->left()) + ":" + cvtToStr(dtypep->right()) + "]";
}
} else if (const AstPackArrayDType* const dtypep = VN_CAST(nodep, PackArrayDType)) {
key += "[";
key += cvtToStr(dtypep->left());
key += ":";
key += cvtToStr(dtypep->right());
key += "] ";
key += paramValueString(dtypep->subDTypep());
} else if (const AstInitArray* const initp = VN_CAST(nodep, InitArray)) {
key += "{";
for (auto it : initp->map()) {
key += paramValueString(it.second->valuep());
key += ",";
}
key += "}";
} else if (const AstNodeDType* const dtypep = VN_CAST(nodep, NodeDType)) {
key += dtypep->prettyDTypeName(true);
}
UASSERT_OBJ(!key.empty(), nodep, "Parameter yielded no value string");
return key;
}

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@ -0,0 +1,18 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('simulator')
test.compile()
test.execute()
test.passes()

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@ -0,0 +1,62 @@
// DESCRIPTION: Verilator: SystemVerilog interface test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2012 by Iztok Jeras.
// SPDX-License-Identifier: CC0-1.0
interface intf #(
parameter type data_t = bit,
parameter int arr[2][4]
) ();
data_t data;
// TODO -- some kind of issue with multi-dimensional array constness:
// %Error: t/t_interface_derived_type.v:12:12: Expecting expression to be constant, but variable isn't const: 'arr'
// : ... note: In instance 't.sub16'
// 19 | logic [arr[0][0]-1:0] other_data;
// | ^~~
// `define SHOW_2D_BUG
`ifdef SHOW_2D_BUG
logic [arr[0][0]-1:0] other_data;
`else
logic [$bits(data)-1:0] other_data;
`endif
endinterface
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
// finish report
always @ (posedge clk) begin
$write("*-* All Finished *-*\n");
$finish;
end
sub #(.width(8), .arr('{'{8, 2, 3, 4}, '{1, 2, 3, 4}})) sub8 ();
sub #(.width(16), .arr('{'{16, 2, 3, 4}, '{1, 2, 3, 4}})) sub16 ();
endmodule
module sub #(
parameter int width,
parameter int arr[2][4]
) ();
typedef struct packed {
logic [3:3] [0:0] [width-1:0] field;
} user_type_t;
intf #(
.data_t(user_type_t),
.arr(arr)
) the_intf ();
logic [width-1:0] signal;
always_comb begin
the_intf.data.field = signal;
the_intf.other_data = signal;
end
endmodule