diff --git a/Changes b/Changes index bf85ba903..ae0390e8b 100644 --- a/Changes +++ b/Changes @@ -26,6 +26,7 @@ Verilator 5.029 devel * Add method to check if there are VPI callbacks of the given type (#5399). [Kaleb Barrett] * Improve Verilation thread pool (#5161). [Bartłomiej Chmiel, Antmicro Ltd.] * Improve performance of V3VariableOrder with parallelism (#5406). [Bartłomiej Chmiel, Antmicro Ltd.] +* Fix `$fatal` to not be affected by `+verilator+error+limit` (#5135). [Gökçe Aydos] * Fix display with multiple string formats (#5311). [Luiza de Melo] * Fix performance of V3Trace when many activity blocks (#5372). [Deniz Güzel] * Fix REALCVT warning on integral timescale conversions (#5378). [Liam Braun] diff --git a/docs/guide/exe_sim.rst b/docs/guide/exe_sim.rst index b0867ae9f..7a449e3fb 100644 --- a/docs/guide/exe_sim.rst +++ b/docs/guide/exe_sim.rst @@ -40,8 +40,8 @@ Summary: .. option:: +verilator+error+limit+ Set number of non-fatal errors (e.g. assertion failures) before exiting - simulation runtime. Also affects number of $stop calls needed before - exit. Defaults to 1. + simulation runtime. Also affects number of `$stop` calls needed before + exit. Does not affect `$fatal`. Defaults to 1. .. option:: +verilator+help diff --git a/include/verilated.cpp b/include/verilated.cpp index 64382aa64..612e76a78 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -128,6 +128,7 @@ void vl_finish(const char* filename, int linenum, const char* hier) VL_MT_UNSAFE #ifndef VL_USER_STOP ///< Define this to override the vl_stop function void vl_stop(const char* filename, int linenum, const char* hier) VL_MT_UNSAFE { + // $stop or $fatal reporting; would break current API to add param as to which const char* const msg = "Verilog $stop"; Verilated::threadContextp()->gotError(true); Verilated::threadContextp()->gotFinish(true); @@ -172,6 +173,7 @@ void vl_fatal(const char* filename, int linenum, const char* hier, const char* m #ifndef VL_USER_STOP_MAYBE ///< Define this to override the vl_stop_maybe function void vl_stop_maybe(const char* filename, int linenum, const char* hier, bool maybe) VL_MT_UNSAFE { + // $stop or $fatal Verilated::threadContextp()->errorCountInc(); if (maybe && Verilated::threadContextp()->errorCount() < Verilated::threadContextp()->errorLimit()) { diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h index cce5b5e90..eea56ac26 100644 --- a/include/verilated_funcs.h +++ b/include/verilated_funcs.h @@ -42,19 +42,20 @@ extern void vl_finish(const char* filename, int linenum, const char* hier) VL_MT /// Routine to call for $stop and non-fatal error /// User code may wish to replace this function, to do so, define VL_USER_STOP. /// This code does not have to be thread safe. -/// Verilator internal code must call VL_FINISH_MT instead, which eventually calls this. +/// Verilator internal code must call VL_STOP_MT instead, which eventually calls this. extern void vl_stop(const char* filename, int linenum, const char* hier) VL_MT_UNSAFE; /// Routine to call for fatal messages /// User code may wish to replace this function, to do so, define VL_USER_FATAL. /// This code does not have to be thread safe. -/// Verilator internal code must call VL_FINISH_MT instead, which eventually calls this. +/// Verilator internal code must call VL_FATAL_MT instead, which eventually calls this. extern void vl_fatal(const char* filename, int linenum, const char* hier, const char* msg) VL_MT_UNSAFE; /// Routine to call for warning messages /// User code may wish to replace this function, to do so, define VL_USER_WARN. /// This code does not have to be thread safe. +/// Verilator internal code must call VL_WARN_MT instead, which eventually calls this. extern void vl_warn(const char* filename, int linenum, const char* hier, const char* msg) VL_MT_UNSAFE; diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp index 315902813..b90e1e106 100644 --- a/src/V3Assert.cpp +++ b/src/V3Assert.cpp @@ -189,7 +189,7 @@ class AssertVisitor final : public VNVisitor { AstNodeStmt* const bodysp = dispp; replaceDisplay(dispp, "%%Error"); // Convert to standard DISPLAY format if (exprsp) dispp->fmtp()->exprsp()->addNext(exprsp); - if (v3Global.opt.stopFail()) bodysp->addNext(new AstStop{nodep->fileline(), true}); + if (v3Global.opt.stopFail()) bodysp->addNext(new AstStop{nodep->fileline(), false}); return bodysp; } diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h index d6ac1fd7e..b37a40a0e 100644 --- a/src/V3AstNodeOther.h +++ b/src/V3AstNodeOther.h @@ -3270,10 +3270,13 @@ public: bool isPure() override { return exprp()->isPure(); } }; class AstStop final : public AstNodeStmt { + const bool m_isFatal; // $fatal not $stop public: - AstStop(FileLine* fl, bool maybe) - : ASTGEN_SUPER_Stop(fl) {} + AstStop(FileLine* fl, bool isFatal) + : ASTGEN_SUPER_Stop(fl), m_isFatal(isFatal) {} ASTGEN_MEMBERS_AstStop; + void dump(std::ostream& str) const override; + void dumpJson(std::ostream& str) const override; bool isGateOptimizable() const override { return false; } bool isPredictOptimizable() const override { return false; } bool isPure() override { return false; } // SPECIAL: $display has 'visual' ordering @@ -3281,6 +3284,8 @@ public: bool isUnlikely() const override { return true; } int instrCount() const override { return 0; } // Rarely executes bool same(const AstNode* samep) const override { return fileline() == samep->fileline(); } + string emitVerilog() const { return m_isFatal ? "$fatal" : "$stop"; } + bool isFatal() const { return m_isFatal; } }; class AstSysFuncAsTask final : public AstNodeStmt { // TODO: This is superseded by AstStmtExpr, remove diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 7f3a15d2d..df592fe49 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -2699,6 +2699,14 @@ void AstFork::dumpJson(std::ostream& str) const { dumpJsonStr(str, "joinType", joinType().ascii()); dumpJsonGen(str); } +void AstStop::dump(std::ostream& str) const { + this->AstNodeStmt::dump(str); + if (isFatal()) str << " [FATAL]"; +} +void AstStop::dumpJson(std::ostream& str) const { + dumpJsonBoolFunc(str, isFatal); + dumpJsonGen(str); +} void AstTraceDecl::dump(std::ostream& str) const { this->AstNodeStmt::dump(str); if (code()) str << " [code=" << code() << "]"; diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h index 910e25016..8e3056239 100644 --- a/src/V3EmitCFunc.h +++ b/src/V3EmitCFunc.h @@ -1004,6 +1004,7 @@ public: puts(", "); puts(cvtToStr(nodep->fileline()->lineno())); puts(", \"\""); + if (nodep->isFatal()) puts(", false"); puts(");\n"); } void visit(AstFinish* nodep) override { diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp index 6c1fd1d16..c3c9c7d8b 100644 --- a/src/V3EmitV.cpp +++ b/src/V3EmitV.cpp @@ -375,7 +375,10 @@ class EmitVBaseVisitorConst VL_NOT_FINAL : public EmitCBaseVisitorConst { iterateAndNextConstNull(nodep->lhsp()); puts(";\n"); } - void visit(AstStop* nodep) override { putfs(nodep, "$stop;\n"); } + void visit(AstStop* nodep) override { + emitVerilogFormat(nodep, nodep->emitVerilog()); + puts(";\n"); + } void visit(AstFinish* nodep) override { putfs(nodep, "$finish;\n"); } void visit(AstStmtExpr* nodep) override { iterateConst(nodep->exprp()); diff --git a/src/verilog.y b/src/verilog.y index 838da1d6d..ed6b72855 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -164,7 +164,7 @@ public: } AstDisplay* createDisplayError(FileLine* fileline) { AstDisplay* nodep = new AstDisplay{fileline, VDisplayType::DT_ERROR, "", nullptr, nullptr}; - AstNode::addNext(nodep, new AstStop{fileline, true}); + AstNode::addNext(nodep, new AstStop{fileline, false}); return nodep; } AstNodeExpr* createGatePin(AstNodeExpr* exprp) { @@ -4238,16 +4238,16 @@ system_t_call: // IEEE: system_tf_call (as task) | yD_ERROR parenE { $$ = GRAMMARP->createDisplayError($1); } | yD_ERROR '(' commasE exprDispList ')' { $$ = new AstDisplay{$1, VDisplayType::DT_ERROR, nullptr, $4}; - $$->addNext(new AstStop{$1, true}); } + $$->addNext(new AstStop{$1, false}); } | yD_FATAL parenE { $$ = new AstDisplay{$1, VDisplayType::DT_FATAL, nullptr, nullptr}; - $$->addNext(new AstStop{$1, false}); } + $$->addNext(new AstStop{$1, true}); } | yD_FATAL '(' expr ')' { $$ = new AstDisplay{$1, VDisplayType::DT_FATAL, nullptr, nullptr}; - $$->addNext(new AstStop{$1, false}); DEL($3); } + $$->addNext(new AstStop{$1, true}); DEL($3); } | yD_FATAL '(' expr ',' exprDispList ')' { $$ = new AstDisplay{$1, VDisplayType::DT_FATAL, nullptr, $5}; - $$->addNext(new AstStop{$1, false}); DEL($3); } + $$->addNext(new AstStop{$1, true}); DEL($3); } // | yD_ASSERTCTL '(' expr ')' { $$ = new AstAssertCtl{$1, $3}; } | yD_ASSERTCTL '(' expr ',' exprE ')' { $$ = new AstAssertCtl{$1, $3, $5}; } diff --git a/test_regress/t/t_dump_json.out b/test_regress/t/t_dump_json.out index 40959ac43..4a302d04d 100644 --- a/test_regress/t/t_dump_json.out +++ b/test_regress/t/t_dump_json.out @@ -399,7 +399,7 @@ ]} ], "thensp": [ - {"type":"STOP","name":"","addr":"(NG)","loc":"d,55:44,55:49"} + {"type":"STOP","name":"","addr":"(NG)","loc":"d,55:44,55:49","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(OG)","loc":"d,58:10,58:12", "condp": [ @@ -412,7 +412,7 @@ ]} ], "thensp": [ - {"type":"STOP","name":"","addr":"(SG)","loc":"d,58:44,58:49"} + {"type":"STOP","name":"","addr":"(SG)","loc":"d,58:44,58:49","isFatal":false} ],"elsesp": []}, {"type":"DISPLAY","name":"","addr":"(TG)","loc":"d,59:10,59:16", "fmtp": [ diff --git a/test_regress/t/t_json_only_debugcheck.out b/test_regress/t/t_json_only_debugcheck.out index 14c9c7cdf..229e8df56 100644 --- a/test_regress/t/t_json_only_debugcheck.out +++ b/test_regress/t/t_json_only_debugcheck.out @@ -116,7 +116,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(YC)","loc":"d,38:142,38:147"} + {"type":"STOP","name":"","addr":"(YC)","loc":"d,38:142,38:147","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(ZC)","loc":"d,39:10,39:12", "condp": [ @@ -190,7 +190,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(YD)","loc":"d,39:158,39:163"} + {"type":"STOP","name":"","addr":"(YD)","loc":"d,39:158,39:163","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(ZD)","loc":"d,40:10,40:12", "condp": [ @@ -264,7 +264,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(YE)","loc":"d,40:142,40:147"} + {"type":"STOP","name":"","addr":"(YE)","loc":"d,40:142,40:147","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(ZE)","loc":"d,41:10,41:12", "condp": [ @@ -362,7 +362,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(GG)","loc":"d,41:174,41:179"} + {"type":"STOP","name":"","addr":"(GG)","loc":"d,41:174,41:179","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(HG)","loc":"d,42:10,42:12", "condp": [ @@ -460,7 +460,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(OH)","loc":"d,42:158,42:163"} + {"type":"STOP","name":"","addr":"(OH)","loc":"d,42:158,42:163","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(PH)","loc":"d,43:10,43:12", "condp": [ @@ -558,7 +558,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(WI)","loc":"d,43:142,43:147"} + {"type":"STOP","name":"","addr":"(WI)","loc":"d,43:142,43:147","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(XI)","loc":"d,44:10,44:12", "condp": [ @@ -608,7 +608,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(QJ)","loc":"d,44:136,44:141"} + {"type":"STOP","name":"","addr":"(QJ)","loc":"d,44:136,44:141","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(RJ)","loc":"d,45:10,45:12", "condp": [ @@ -658,7 +658,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(IK)","loc":"d,45:142,45:147"} + {"type":"STOP","name":"","addr":"(IK)","loc":"d,45:142,45:147","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(JK)","loc":"d,46:10,46:12", "condp": [ @@ -732,7 +732,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(IL)","loc":"d,46:158,46:163"} + {"type":"STOP","name":"","addr":"(IL)","loc":"d,46:158,46:163","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(JL)","loc":"d,47:10,47:12", "condp": [ @@ -806,7 +806,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(IM)","loc":"d,47:142,47:147"} + {"type":"STOP","name":"","addr":"(IM)","loc":"d,47:142,47:147","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(JM)","loc":"d,49:10,49:12", "condp": [ @@ -863,7 +863,7 @@ {"type":"VARREF","name":"__Vtemp_1","addr":"(EN)","loc":"d,49:123,49:127","dtypep":"(RB)","access":"RD","varp":"(YB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(FN)","loc":"d,49:140,49:145"} + {"type":"STOP","name":"","addr":"(FN)","loc":"d,49:140,49:145","isFatal":false} ],"elsesp": []}, {"type":"ASSIGN","name":"","addr":"(GN)","loc":"d,51:11,51:12","dtypep":"(RB)", "rhsp": [ @@ -993,7 +993,7 @@ {"type":"VARREF","name":"t.all","addr":"(AP)","loc":"d,57:124,57:127","dtypep":"(RB)","access":"RD","varp":"(QB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(BP)","loc":"d,57:146,57:151"} + {"type":"STOP","name":"","addr":"(BP)","loc":"d,57:146,57:151","isFatal":false} ],"elsesp": []} ],"finalsp": []}, {"type":"CFUNC","name":"_eval_final","addr":"(CP)","loc":"a,0:0,0:0","slow":true,"isStatic":false,"dpiExportDispatcher":false,"dpiExportImpl":false,"dpiImportPrototype":false,"dpiImportWrapper":false,"dpiContext":false,"isConstructor":false,"isDestructor":false,"isVirtual":false,"isCoroutine":false,"needProcess":false,"scopep":"(Y)","argsp": [],"initsp": [],"stmtsp": [],"finalsp": []}, @@ -1286,7 +1286,7 @@ {"type":"VARREF","name":"__Vtemp_1","addr":"(OT)","loc":"d,68:126,68:130","dtypep":"(RB)","access":"RD","varp":"(VR)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(PT)","loc":"d,68:143,68:148"} + {"type":"STOP","name":"","addr":"(PT)","loc":"d,68:143,68:148","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(QT)","loc":"d,69:13,69:15", "condp": [ @@ -1336,7 +1336,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(HU)","loc":"d,69:139,69:144"} + {"type":"STOP","name":"","addr":"(HU)","loc":"d,69:139,69:144","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(IU)","loc":"d,70:13,70:15", "condp": [ @@ -1386,7 +1386,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(ZU)","loc":"d,70:145,70:150"} + {"type":"STOP","name":"","addr":"(ZU)","loc":"d,70:145,70:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(AV)","loc":"d,71:13,71:15", "condp": [ @@ -1460,7 +1460,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(ZV)","loc":"d,71:145,71:150"} + {"type":"STOP","name":"","addr":"(ZV)","loc":"d,71:145,71:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(AW)","loc":"d,72:13,72:15", "condp": [ @@ -1510,7 +1510,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(RW)","loc":"d,72:139,72:144"} + {"type":"STOP","name":"","addr":"(RW)","loc":"d,72:139,72:144","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(SW)","loc":"d,73:13,73:15", "condp": [ @@ -1560,7 +1560,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(JX)","loc":"d,73:145,73:150"} + {"type":"STOP","name":"","addr":"(JX)","loc":"d,73:145,73:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(KX)","loc":"d,74:13,74:15", "condp": [ @@ -1634,7 +1634,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(JY)","loc":"d,74:145,74:150"} + {"type":"STOP","name":"","addr":"(JY)","loc":"d,74:145,74:150","isFatal":false} ],"elsesp": []}, {"type":"ASSIGNDLY","name":"","addr":"(KY)","loc":"d,75:12,75:14","dtypep":"(AC)", "rhsp": [ @@ -1711,7 +1711,7 @@ {"type":"VARREF","name":"__Vtemp_2","addr":"(KZ)","loc":"d,78:126,78:130","dtypep":"(RB)","access":"RD","varp":"(WR)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(LZ)","loc":"d,78:143,78:148"} + {"type":"STOP","name":"","addr":"(LZ)","loc":"d,78:143,78:148","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(MZ)","loc":"d,79:13,79:15", "condp": [ @@ -1761,7 +1761,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(DAB)","loc":"d,79:139,79:144"} + {"type":"STOP","name":"","addr":"(DAB)","loc":"d,79:139,79:144","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(EAB)","loc":"d,80:13,80:15", "condp": [ @@ -1811,7 +1811,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(VAB)","loc":"d,80:145,80:150"} + {"type":"STOP","name":"","addr":"(VAB)","loc":"d,80:145,80:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(WAB)","loc":"d,81:13,81:15", "condp": [ @@ -1885,7 +1885,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(VBB)","loc":"d,81:145,81:150"} + {"type":"STOP","name":"","addr":"(VBB)","loc":"d,81:145,81:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(WBB)","loc":"d,82:13,82:15", "condp": [ @@ -1935,7 +1935,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(NCB)","loc":"d,82:139,82:144"} + {"type":"STOP","name":"","addr":"(NCB)","loc":"d,82:139,82:144","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(OCB)","loc":"d,83:13,83:15", "condp": [ @@ -1985,7 +1985,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(FDB)","loc":"d,83:145,83:150"} + {"type":"STOP","name":"","addr":"(FDB)","loc":"d,83:145,83:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(GDB)","loc":"d,84:13,84:15", "condp": [ @@ -2059,7 +2059,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(FEB)","loc":"d,84:145,84:150"} + {"type":"STOP","name":"","addr":"(FEB)","loc":"d,84:145,84:150","isFatal":false} ],"elsesp": []}, {"type":"ASSIGNDLY","name":"","addr":"(GEB)","loc":"d,85:12,85:14","dtypep":"(AC)", "rhsp": [ @@ -2136,7 +2136,7 @@ {"type":"VARREF","name":"__Vtemp_3","addr":"(GFB)","loc":"d,88:126,88:130","dtypep":"(RB)","access":"RD","varp":"(XR)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(HFB)","loc":"d,88:143,88:148"} + {"type":"STOP","name":"","addr":"(HFB)","loc":"d,88:143,88:148","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(IFB)","loc":"d,89:13,89:15", "condp": [ @@ -2186,7 +2186,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(ZFB)","loc":"d,89:139,89:144"} + {"type":"STOP","name":"","addr":"(ZFB)","loc":"d,89:139,89:144","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(AGB)","loc":"d,90:13,90:15", "condp": [ @@ -2236,7 +2236,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(RGB)","loc":"d,90:145,90:150"} + {"type":"STOP","name":"","addr":"(RGB)","loc":"d,90:145,90:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(SGB)","loc":"d,91:13,91:15", "condp": [ @@ -2310,7 +2310,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(RHB)","loc":"d,91:145,91:150"} + {"type":"STOP","name":"","addr":"(RHB)","loc":"d,91:145,91:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(SHB)","loc":"d,92:13,92:15", "condp": [ @@ -2360,7 +2360,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(JIB)","loc":"d,92:139,92:144"} + {"type":"STOP","name":"","addr":"(JIB)","loc":"d,92:139,92:144","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(KIB)","loc":"d,93:13,93:15", "condp": [ @@ -2410,7 +2410,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(BJB)","loc":"d,93:145,93:150"} + {"type":"STOP","name":"","addr":"(BJB)","loc":"d,93:145,93:150","isFatal":false} ],"elsesp": []}, {"type":"IF","name":"","addr":"(CJB)","loc":"d,94:13,94:15", "condp": [ @@ -2484,7 +2484,7 @@ ]} ],"scopeNamep": []} ],"filep": []}, - {"type":"STOP","name":"","addr":"(BKB)","loc":"d,94:145,94:150"} + {"type":"STOP","name":"","addr":"(BKB)","loc":"d,94:145,94:150","isFatal":false} ],"elsesp": []}, {"type":"ASSIGNDLY","name":"","addr":"(CKB)","loc":"d,95:12,95:14","dtypep":"(AC)", "rhsp": [ diff --git a/test_regress/t/t_runflag_errorlimit_fatal_bad.out b/test_regress/t/t_runflag_errorlimit_fatal_bad.out new file mode 100644 index 000000000..e99870e4d --- /dev/null +++ b/test_regress/t/t_runflag_errorlimit_fatal_bad.out @@ -0,0 +1,5 @@ +[0] %Error: t_runflag_errorlimit_fatal_bad.v:9: Assertion failed in top.t: One +-Info: t/t_runflag_errorlimit_fatal_bad.v:9: Verilog $stop, ignored due to +verilator+error+limit +[0] %Fatal: t_runflag_errorlimit_fatal_bad.v:10: Assertion failed in top.t +%Error: t/t_runflag_errorlimit_fatal_bad.v:10: Verilog $stop +Aborting... diff --git a/test_regress/t/t_runflag_errorlimit_fatal_bad.py b/test_regress/t/t_runflag_errorlimit_fatal_bad.py new file mode 100755 index 000000000..2370a882b --- /dev/null +++ b/test_regress/t/t_runflag_errorlimit_fatal_bad.py @@ -0,0 +1,20 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt_all') + +test.compile() + +test.execute(all_run_flags=["+verilator+error+limit+3"], + fails=True, + expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_runflag_errorlimit_fatal_bad.v b/test_regress/t/t_runflag_errorlimit_fatal_bad.v new file mode 100644 index 000000000..e4c546f64 --- /dev/null +++ b/test_regress/t/t_runflag_errorlimit_fatal_bad.v @@ -0,0 +1,18 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2019 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +module t; + initial begin + $error("One"); + $fatal; + $error("Two"); + $error("Three"); + $error("Four"); + $error("Five"); + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule