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Internals: whitespace

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Wilson Snyder 2024-11-09 21:33:22 -05:00
parent b741105329
commit 0e11b0929c
1 changed files with 24 additions and 22 deletions
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18
src/verilog.y
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@ -2080,10 +2080,14 @@ tf_port_declaration<nodep>: // ==IEEE: tf_port_declaration
// // Used inside function; followed by ';' // // Used inside function; followed by ';'
// // SEE ALSO port_declaration, port, data_declarationVarFront // // SEE ALSO port_declaration, port, data_declarationVarFront
// //
port_directionReset data_type { VARDTYPE($2); } list_of_tf_variable_identifiers ';' { $$ = $4; } port_directionReset data_type { VARDTYPE($2); } list_of_tf_variable_identifiers ';'
| port_directionReset implicit_typeE { VARDTYPE_NDECL($2); } list_of_tf_variable_identifiers ';' { $$ = $4; } { $$ = $4; }
| port_directionReset yVAR data_type { VARDTYPE($3); } list_of_tf_variable_identifiers ';' { $$ = $5; } | port_directionReset implicit_typeE { VARDTYPE_NDECL($2); } list_of_tf_variable_identifiers ';'
| port_directionReset yVAR implicit_typeE { VARDTYPE($3); } list_of_tf_variable_identifiers ';' { $$ = $5; } { $$ = $4; }
| port_directionReset yVAR data_type { VARDTYPE($3); } list_of_tf_variable_identifiers ';'
{ $$ = $5; }
| port_directionReset yVAR implicit_typeE { VARDTYPE($3); } list_of_tf_variable_identifiers ';'
{ $$ = $5; }
; ;
integer_atom_type<basicDTypep>: // ==IEEE: integer_atom_type integer_atom_type<basicDTypep>: // ==IEEE: integer_atom_type
@ -2766,11 +2770,9 @@ always_construct<nodep>: // IEEE: == always_construct
continuous_assign<nodep>: // IEEE: continuous_assign continuous_assign<nodep>: // IEEE: continuous_assign
yASSIGN driveStrengthE delay_controlE assignList ';' yASSIGN driveStrengthE delay_controlE assignList ';'
{ { $$ = $4;
$$ = $4;
STRENGTH_LIST($4, $2, AssignW); STRENGTH_LIST($4, $2, AssignW);
DELAY_LIST($3, $4); DELAY_LIST($3, $4); }
}
; ;
initial_construct<nodep>: // IEEE: initial_construct initial_construct<nodep>: // IEEE: initial_construct