Add tests of tracing SystemC model verilated with --hierarchical (#3252)

* Tests: Add t_hier_block_sc_trace(fst|vcd) that tests tracing hierarchical block on SystemC.

* Add a check that elaboration is done before a trace file is opened.

* Add a check that elaboration is done before trace() is called to verilated SystemC model.

* Tests: call sc_core::sc_start(sc_core::SC_ZERO_TIME) before opening a trace file

* Tests: Fix t_trace_two_sc to call sc_start before opening trace

* Use vl_fatal as suggested in PR review.

include/verilated_fst_c.h

@@ -139,7 +139,7 @@ public:
     explicit VerilatedFstC(void* filep = nullptr)
         : m_sptrace{filep} {}
     /// Destruct, flush, and close the dump
-    ~VerilatedFstC() { close(); }
+    virtual ~VerilatedFstC() { close(); }
 
     // METHODS - User called
 

include/verilated_fst_sc.cpp

@@ -27,6 +27,17 @@
 //======================================================================
 //======================================================================
 
+void VerilatedFstSc::open(const char* filename) {
+    if (!sc_core::sc_get_curr_simcontext()->elaboration_done()) {
+        vl_fatal(__FILE__, __LINE__, "VerilatedFstSc",
+                 ("%Error: VerilatedFstSc::open(\"" + std::string(filename)
+                  + "\") is called before sc_core::sc_start(). "
+                    "Run sc_core::sc_start(sc_core::SC_ZERO_TIME) before opening a wave file.")
+                     .c_str());
+    }
+    VerilatedFstC::open(filename);
+}
+
 //--------------------------------------------------
 // SystemC 2.1.v1
 // cppcheck-suppress unusedFunction

include/verilated_fst_sc.h

@@ -57,6 +57,9 @@ public:
         if (!delta_cycle) { this->dump(sc_time_stamp().to_double()); }
     }
 
+    // Override VerilatedFstC. Must be called after starting simulation.
+    virtual void open(const char* filename) /*override*/ VL_MT_SAFE;
+
 private:
     /// Fake outs for linker
 

include/verilated_vcd_c.h

@@ -346,7 +346,7 @@ public:
     explicit VerilatedVcdC(VerilatedVcdFile* filep = nullptr)
         : m_sptrace{filep} {}
     /// Destruct, flush, and close the dump
-    ~VerilatedVcdC() { close(); }
+    virtual ~VerilatedVcdC() { close(); }
 
 public:
     // METHODS - User called
@@ -356,7 +356,7 @@ public:
     /// Open a new VCD file
     /// This includes a complete header dump each time it is called,
     /// just as if this object was deleted and reconstructed.
-    void open(const char* filename) VL_MT_SAFE { m_sptrace.open(filename); }
+    virtual void open(const char* filename) VL_MT_SAFE { m_sptrace.open(filename); }
     /// Continue a VCD dump by rotating to a new file name
     /// The header is only in the first file created, this allows
     /// "cat" to be used to combine the header plus any number of data files.

include/verilated_vcd_sc.cpp

@@ -27,6 +27,17 @@
 //======================================================================
 //======================================================================
 
+void VerilatedVcdSc::open(const char* filename) {
+    if (!sc_core::sc_get_curr_simcontext()->elaboration_done()) {
+        vl_fatal(__FILE__, __LINE__, "VerilatedVcdSc",
+                 ("%Error: VerilatedVcdSc::open(\"" + std::string(filename)
+                  + "\") is called before sc_core::sc_start(). "
+                    "Run sc_core::sc_start(sc_core::SC_ZERO_TIME) before opening a wave file.")
+                     .c_str());
+    }
+    VerilatedVcdC::open(filename);
+}
+
 //--------------------------------------------------
 // SystemC 2.1.v1
 // cppcheck-suppress unusedFunction

include/verilated_vcd_sc.h

@@ -60,6 +60,9 @@ public:
         if (!delta_cycle) this->dump(sc_time_stamp().to_double());
     }
 
+    // Override VerilatedVcdC. Must be called after starting simulation.
+    virtual void open(const char* filename) /*override*/ VL_MT_SAFE;
+
 private:
     // METHODS - Fake outs for linker
 

src/V3EmitCModel.cpp

@@ -582,6 +582,14 @@ class EmitCModel final : public EmitCFunc {
         // ::trace
         puts("\nVL_ATTR_COLD void " + topClassName() + "::trace(");
         puts(v3Global.opt.traceClassBase() + "C* tfp, int levels, int options) {\n");
+        if (optSystemC()) {
+            puts(/**/ "if (!sc_core::sc_get_curr_simcontext()->elaboration_done()) {\n");
+            puts(/****/ "vl_fatal(__FILE__, __LINE__, name(), \"" + topClassName()
+                 + +"::trace() is called before sc_core::sc_start(). "
+                    "Run sc_core::sc_start(sc_core::SC_ZERO_TIME) before trace() to complete "
+                    "elaboration.\");\n");
+            puts(/**/ "}");
+        }
         puts(/**/ "if (false && levels && options) {}  // Prevent unused\n");
         puts(/**/ "tfp->spTrace()->addInitCb(&" + protect("trace_init") + ", &(vlSymsp->TOP));\n");
         puts(/**/ topModNameProtected + "__" + protect("trace_register")

test_regress/driver.pl

@@ -1844,6 +1844,7 @@ sub _make_main {
         $fh->print("    std::unique_ptr<VerilatedFstSc> tfp{new VerilatedFstSc};\n") if $self->{trace_format} eq 'fst-sc';
         $fh->print("    std::unique_ptr<VerilatedVcdC> tfp{new VerilatedVcdC};\n") if $self->{trace_format} eq 'vcd-c';
         $fh->print("    std::unique_ptr<VerilatedVcdSc> tfp{new VerilatedVcdSc};\n") if $self->{trace_format} eq 'vcd-sc';
+        $fh->print("    sc_core::sc_start(sc_core::SC_ZERO_TIME);  // Finish elaboration before trace and open\n") if $self->sc;
         $fh->print("    topp->trace(tfp.get(), 99);\n");
         $fh->print("    tfp->open(\"" . $self->trace_filename . "\");\n");
 

test_regress/t/t_hier_block_sc_trace_fst.pl

@@ -0,0 +1,44 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+# stats will be deleted but generation will be skipped if libs of hierarchical blocks exist.
+clean_objs();
+
+top_filename("t/t_hier_block.v");
+
+# CI environment offers 2 VCPUs, 2 thread setting causes the following warning.
+# %Warning-UNOPTTHREADS: Thread scheduler is unable to provide requested parallelism; consider asking for fewer threads.
+# So use 6 threads here though it's not optimal in performace wise, but ok.
+scenarios(vlt_all => 1);
+
+compile(
+    v_flags2 => ['t/t_hier_block.cpp'],
+    verilator_flags2 => ['--sc',
+                         '--stats',
+                         '--hierarchical',
+                         ($Self->{vltmt} ? ' --threads 6' : ''),
+                         '--CFLAGS', '"-pipe -DCPP_MACRO=cplusplus"',
+                         "--CFLAGS", '"-O0 -ggdb"',
+                         "--trace-fst"
+    ],
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+file_grep($Self->{obj_dir} . "/Vsub0/sub0.sv", /^module\s+(\S+)\s+/, "sub0");
+file_grep($Self->{obj_dir} . "/Vsub1/sub1.sv", /^module\s+(\S+)\s+/, "sub1");
+file_grep($Self->{obj_dir} . "/Vsub2/sub2.sv", /^module\s+(\S+)\s+/, "sub2");
+file_grep($Self->{stats}, qr/HierBlock,\s+Hierarchical blocks\s+(\d+)/i, 13);
+file_grep($Self->{run_log_filename}, qr/MACRO:(\S+) is defined/i, "cplusplus");
+
+fst_identical($Self->trace_filename, $Self->{golden_filename});
+ok(1);
+1;

test_regress/t/t_hier_block_sc_trace_vcd.pl

@@ -0,0 +1,44 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+# stats will be deleted but generation will be skipped if libs of hierarchical blocks exist.
+clean_objs();
+
+top_filename("t/t_hier_block.v");
+
+# CI environment offers 2 VCPUs, 2 thread setting causes the following warning.
+# %Warning-UNOPTTHREADS: Thread scheduler is unable to provide requested parallelism; consider asking for fewer threads.
+# So use 6 threads here though it's not optimal in performace wise, but ok.
+scenarios(vlt_all => 1);
+
+compile(
+    v_flags2 => ['t/t_hier_block.cpp'],
+    verilator_flags2 => ['--sc',
+                         '--stats',
+                         '--hierarchical',
+                         ($Self->{vltmt} ? ' --threads 6' : ''),
+                         '--CFLAGS', '"-pipe -DCPP_MACRO=cplusplus"',
+                         "--CFLAGS", '"-O0 -ggdb"',
+                         "--trace"
+    ],
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+file_grep($Self->{obj_dir} . "/Vsub0/sub0.sv", /^module\s+(\S+)\s+/, "sub0");
+file_grep($Self->{obj_dir} . "/Vsub1/sub1.sv", /^module\s+(\S+)\s+/, "sub1");
+file_grep($Self->{obj_dir} . "/Vsub2/sub2.sv", /^module\s+(\S+)\s+/, "sub2");
+file_grep($Self->{stats}, qr/HierBlock,\s+Hierarchical blocks\s+(\d+)/i, 13);
+file_grep($Self->{run_log_filename}, qr/MACRO:(\S+) is defined/i, "cplusplus");
+
+vcd_identical($Self->trace_filename, $Self->{golden_filename});
+ok(1);
+1;

test_regress/t/t_trace_two_sc.cpp

@@ -40,6 +40,7 @@ int sc_main(int argc, char** argv) {
 
 #ifdef TEST_HDR_TRACE
     VerilatedVcdSc* tfp = new VerilatedVcdSc;
+    sc_core::sc_start(sc_core::SC_ZERO_TIME);
     ap->trace(tfp, 99);
     bp->trace(tfp, 99);
     tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd");