Fix false MULTITOP on bound interfaces (#4438).

This commit is contained in:
Wilson Snyder 2023-08-25 08:21:15 -04:00
parent 10dd675371
commit 00d63883f8
4 changed files with 45 additions and 1 deletions

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@ -21,6 +21,7 @@ Verilator 5.015 devel
* Fix variable lifetimes in extern methods (#4414). [Krzysztof Boroński]
* Fix multple function definitions in V3Sched (#4416). [Hennadii Chernyshchyk]
* Fix false UNUSEDPARAM on generate localparam (#4427). [Bill Pringlemeir]
* Fix false MULTITOP on bound interfaces (#4438). [Alex Solomatnikov]
Verilator 5.014 2023-08-06

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@ -53,7 +53,7 @@ void V3LinkLevel::modSortByLevel() {
ModVec tops; // Top level modules
for (AstNodeModule* nodep = v3Global.rootp()->modulesp(); nodep;
nodep = VN_AS(nodep->nextp(), NodeModule)) {
if (nodep->level() <= 2) tops.push_back(nodep);
if (nodep->level() <= 2 && !VN_IS(nodep, NotFoundModule)) tops.push_back(nodep);
mods.push_back(nodep);
}
if (tops.size() >= 2) {

16
test_regress/t/t_bind_nfound.pl Executable file
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@ -0,0 +1,16 @@
#!/usr/bin/env perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2008 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
scenarios(linter => 1);
lint();
ok(1);
1;

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@ -0,0 +1,27 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2023 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
interface bound_if;
endinterface
module t;
sub sub();
initial begin
$write("*-* All Finished *-*\n");
$finish;
end
endmodule
module sub_ext;
bind sub_inst bound_if i_bound();
endmodule
module sub;
sub_ext sub_ext();
endmodule