diff --git a/src/V3Options.cpp b/src/V3Options.cpp index d111bfeb3..dee87bee0 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -416,8 +416,18 @@ string V3Options::allArgsStringForHierBlock(bool forTop, bool forCMake) const { std::set vFiles; for (const auto& vFile : m_vFiles) vFiles.insert(vFile); string out; + bool stripArg = false; + bool stripArgIfNum = false; for (std::list::const_iterator it = m_impp->m_lineArgs.begin(); it != m_impp->m_lineArgs.end(); ++it) { + if (stripArg) { + stripArg = false; + continue; + } + if (stripArgIfNum) { + stripArgIfNum = false; + if (isdigit((*it)[0])) continue; + } int skip = 0; if (it->length() >= 2 && (*it)[0] == '-' && (*it)[1] == '-') { skip = 2; @@ -428,8 +438,9 @@ string V3Options::allArgsStringForHierBlock(bool forTop, bool forCMake) const { const string opt = it->substr(skip); // Remove '-' in the beginning const int numStrip = stripOptionsForChildRun(opt, forTop); if (numStrip) { - UASSERT(0 <= numStrip && numStrip <= 2, "should be one of 0, 1, 2"); - if (numStrip == 2) ++it; + UASSERT(0 <= numStrip && numStrip <= 3, "should be one of 0, 1, 2, 3"); + if (numStrip == 2) stripArg = true; + if (numStrip == 3) stripArgIfNum = true; continue; } } else { // Not an option @@ -536,10 +547,12 @@ string V3Options::filePathCheckOneDir(const string& modname, const string& dirna // 0: Keep the option including its argument // 1: Delete the option which has no argument // 2: Delete the option and its argument +// 3: Delete the option and its argument if it is a number int V3Options::stripOptionsForChildRun(const string& opt, bool forTop) { - if (opt == "Mdir" || opt == "clk" || opt == "lib-create" || opt == "f" || opt == "j" + if (opt == "j") return 3; + if (opt == "Mdir" || opt == "clk" || opt == "lib-create" || opt == "f" || opt == "v" || opt == "l2-name" || opt == "mod-prefix" || opt == "prefix" || opt == "protect-lib" - || opt == "protect-key" || opt == "threads" || opt == "top-module" || opt == "v") { + || opt == "protect-key" || opt == "threads" || opt == "top-module") { return 2; } if (opt == "build" || (!forTop && (opt == "cc" || opt == "exe" || opt == "sc")) diff --git a/test_regress/t/t_flag_j_hier.py b/test_regress/t/t_flag_j_hier.py new file mode 100755 index 000000000..4c393789a --- /dev/null +++ b/test_regress/t/t_flag_j_hier.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2024 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('vlt') + +test.compile(verilator_flags2=['--hierarchical -j --build-jobs 2']) + +test.passes() diff --git a/test_regress/t/t_flag_j_hier.v b/test_regress/t/t_flag_j_hier.v new file mode 100644 index 000000000..885f06437 --- /dev/null +++ b/test_regress/t/t_flag_j_hier.v @@ -0,0 +1,14 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2024 by Antmicro. +// SPDX-License-Identifier: CC0-1.0 + +module t (/*AUTOARG*/); + logic a; + s u_s(.a(a)); +endmodule + +module s(output logic a); + /*verilator hier_block*/ +endmodule