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35 lines
1.2 KiB
Python
35 lines
1.2 KiB
Python
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('vlt')
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test.top_filename = "t/t_enum_type_methods.v"
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out_filename = test.obj_dir + "/V" + test.name + ".xml"
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test.compile(verilator_flags2=['--no-std', '--debug-check', '--flatten'],
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verilator_make_gmake=False,
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make_top_shell=False,
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make_main=False)
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test.files_identical(out_filename, test.golden_filename, 'logfile')
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# make sure that certain tags are present in --debug-check
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# that would not be present in --xml-only
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test.file_grep(out_filename, r'<constpool')
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test.file_grep(out_filename, r'<inititem')
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test.file_grep(out_filename, r'<if')
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test.file_grep(out_filename, r'<while')
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test.file_grep(out_filename, r'<begin>') # for <if> and <while>
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test.file_grep(out_filename, r' signed=') # for <basicdtype>
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test.file_grep(out_filename, r' func=') # for <ccall>
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test.passes()
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