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verilator/test_regress/t/t_tri_pull_bad.v

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// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2010 by Lane Brooks.
// SPDX-License-Identifier: CC0-1.0
module t (clk);
input clk;
wire A;
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pullup p1(A);
pulldown p2(A);
endmodule