verilator/test_regress/t/t_lint_latch_bad_2.v

// DESCRIPTION: Verilator: Verilog Test module for Issue#1609
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2020 by Julien Margetts.

module t (/*AUTOARG*/ a, b, o);
   input  a;
   input  b;
   output reg o;

   always_comb
     if (a)
       o = b;

endmodule
Add LATCH and NOLATCH warnings (#1609) (#2740). 2021-01-05 19:26:01 +00:00			`// DESCRIPTION: Verilator: Verilog Test module for Issue#1609`
			`//`
			`// This file ONLY is placed into the Public Domain, for any use,`
			`// without warranty, 2020 by Julien Margetts.`

			`module t (/AUTOARG/ a, b, o);`
			`input a;`
			`input b;`
			`output reg o;`

IEEE compliant scheduler (#3384) This is a major re-design of the way code is scheduled in Verilator, with the goal of properly supporting the Active and NBA regions of the SystemVerilog scheduling model, as defined in IEEE 1800-2017 chapter 4. With this change, all internally generated clocks should simulate correctly, and there should be no more need for the `clock_enable` and `clocker` attributes for correctness in the absence of Verilator generated library models (`--lib-create`). Details of the new scheduling model and algorithm are provided in docs/internals.rst. Implements #3278 2022-05-15 15:03:32 +00:00			`always_comb`
Add LATCH and NOLATCH warnings (#1609) (#2740). 2021-01-05 19:26:01 +00:00			`if (a)`
IEEE compliant scheduler (#3384) This is a major re-design of the way code is scheduled in Verilator, with the goal of properly supporting the Active and NBA regions of the SystemVerilog scheduling model, as defined in IEEE 1800-2017 chapter 4. With this change, all internally generated clocks should simulate correctly, and there should be no more need for the `clock_enable` and `clocker` attributes for correctness in the absence of Verilator generated library models (`--lib-create`). Details of the new scheduling model and algorithm are provided in docs/internals.rst. Implements #3278 2022-05-15 15:03:32 +00:00			`o = b;`
Add LATCH and NOLATCH warnings (#1609) (#2740). 2021-01-05 19:26:01 +00:00
			`endmodule`