2012-04-13 01:08:20 +00:00
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// -*- mode: C++; c-file-style: "cc-mode" -*-
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//
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2006-08-26 11:35:28 +00:00
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2006 by Wilson Snyder.
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#include <verilated.h>
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#include "Vt_func_rand.h"
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2018-08-25 13:52:45 +00:00
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int main(int argc, char *argv[]) {
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2006-08-26 11:35:28 +00:00
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Vt_func_rand *topp = new Vt_func_rand;
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Verilated::debug(0);
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2018-08-25 13:52:45 +00:00
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printf("\nTesting\n");
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2006-08-26 11:35:28 +00:00
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for (int i = 0; i < 10; i++) {
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2019-05-08 02:34:09 +00:00
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topp->clk = 0;
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topp->eval();
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topp->clk = 1;
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topp->eval();
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2006-08-26 11:35:28 +00:00
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}
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if (topp->Rand != 0xfeed0fad) {
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2019-05-08 02:34:09 +00:00
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vl_fatal(__FILE__,__LINE__,"top", "Unexpected value for Rand output\n");
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2006-08-26 11:35:28 +00:00
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}
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2018-08-25 13:52:45 +00:00
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printf("*-* All Finished *-*\n");
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2006-08-26 11:35:28 +00:00
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}
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