verilator/test_regress/t/t_sys_readmem_bad_end.mem

// DESCRIPTION: Verilator: Verilog Test data file
//
// Copyright 2006 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License Version 3 or the Perl Artistic License
// Version 2.0.

00
01
10
// Missing additional data
Add support. git-svn-id: file://localhost/svn/verilator/trunk/verilator@846 77ca24e4-aefa-0310-84f0-b9a241c72d87 2006-12-19 14:09:57 +00:00			`// DESCRIPTION: Verilator: Verilog Test data file`
			`//`
			`// Copyright 2006 by Wilson Snyder. This program is free software; you can`
			`// redistribute it and/or modify it under the terms of either the GNU`
Verilator is now licensed under LGPL v3 and/or Artistic v2.0. 2009-05-04 21:07:57 +00:00			`// Lesser General Public License Version 3 or the Perl Artistic License`
			`// Version 2.0.`
Add support. git-svn-id: file://localhost/svn/verilator/trunk/verilator@846 77ca24e4-aefa-0310-84f0-b9a241c72d87 2006-12-19 14:09:57 +00:00
			`00`
			`01`
			`10`
			`// Missing additional data`