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33 lines
1.1 KiB
Python
33 lines
1.1 KiB
Python
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#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('simulator')
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test.top_filename = "t/t_trace_complex.v"
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test.golden_filename = "t/t_trace_complex.out"
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test.compile(verilator_flags2=['--cc --trace --trace-threads 1'])
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test.execute()
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test.file_grep(test.trace_filename, r' v_strp ')
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test.file_grep(test.trace_filename, r' v_strp_strp ')
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test.file_grep(test.trace_filename, r' v_arrp ')
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test.file_grep(test.trace_filename, r' v_arrp_arrp ')
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test.file_grep(test.trace_filename, r' v_arrp_strp ')
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test.file_grep(test.trace_filename, r' v_arru\[')
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test.file_grep(test.trace_filename, r' v_arru_arru\[')
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test.file_grep(test.trace_filename, r' v_arru_arrp\[')
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test.file_grep(test.trace_filename, r' v_arru_strp\[')
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test.vcd_identical(test.trace_filename, test.golden_filename)
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test.passes()
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