verilator/test_regress/t/t_lint_rsvd_bad.out

%Error: t/t_lint_rsvd_bad.v:6: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
config cfgBad;
^~~~~~
%Error: t/t_lint_rsvd_bad.v:6: syntax error, unexpected IDENTIFIER
config cfgBad;
       ^~~~~~
%Error: t/t_lint_rsvd_bad.v:7: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
endconfig
^~~~~~~~~
%Error: Exiting due to
Quote reserved word messages, and related internal cleanups. 2019-07-12 00:49:35 +00:00			`%Error: t/t_lint_rsvd_bad.v:6: Unsupported: Verilog 2001-config reserved word not implemented: 'config'`
When showing an error, show source code. 2019-07-15 01:42:03 +00:00			`config cfgBad;`
			`^~~~~~`
Quote reserved word messages, and related internal cleanups. 2019-07-12 00:49:35 +00:00			`%Error: t/t_lint_rsvd_bad.v:6: syntax error, unexpected IDENTIFIER`
When showing an error, show source code. 2019-07-15 01:42:03 +00:00			`config cfgBad;`
			`^~~~~~`
Quote reserved word messages, and related internal cleanups. 2019-07-12 00:49:35 +00:00			`%Error: t/t_lint_rsvd_bad.v:7: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'`
When showing an error, show source code. 2019-07-15 01:42:03 +00:00			`endconfig`
			`^~~~~~~~~`
Quote reserved word messages, and related internal cleanups. 2019-07-12 00:49:35 +00:00			`%Error: Exiting due to`