verilator/test_regress/t/t_math_svl.pl

#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2005 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.

compile (
	 ) if $Self->{v3};

execute (
	 check_finished=>1,
	 # Make sure we get the finish statement called
	 expect=>
'\*-\* All Finished \*-\*
Goodbye world, at cycle \d+.*',
     ) if $Self->{v3};

ok(1);
1;