verilator/docs/gen/ex_STMTDLY_msg.rst

mirror of https://github.com/verilator/verilator.git synced 2025-01-05 22:27:35 +00:00
.. comment: generated by t_lint_stmtdly_bad
.. code-block::

   %Warning-STMTDLY: example.v:1:7 Ignoring delay on this statement due to --no-timing
Commentary 2021-09-18 00:03:45 +00:00			`.. comment: generated by t_lint_stmtdly_bad`
			`.. code-block::`

Use `AstDelay` nodes for intra-assignment delays (#3672) Also fix messy implementation of net delays. Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com> 2022-10-14 07:35:26 +00:00			`%Warning-STMTDLY: example.v:1:7 Ignoring delay on this statement due to --no-timing`