verilator/test_regress/t/t_param_noval_bad.v

14 lines
339 B
Systemverilog
Raw Normal View History

2019-11-05 00:22:59 +00:00
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2019 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
2019-11-05 00:22:59 +00:00
module t #(parameter P);
generate
var j;
for (j=0; P; j++)
initial begin end
endgenerate
endmodule