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10 lines
213 B
Systemverilog
10 lines
213 B
Systemverilog
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2020 by Wilson Snyder.
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`define test(a1,a2) ((a1) + (a2))
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`test val
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( 1,2)
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