verilator/test_regress/t/t_lint_rsvd_bad.out

%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
    7 | config cfgBad;
      | ^~~~~~
                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
%Error: t/t_lint_rsvd_bad.v:7:8: syntax error, unexpected IDENTIFIER
    7 | config cfgBad;
      |        ^~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:8:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
    8 |    design rtlLib.top;
      |    ^~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:9:12: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
    9 |    default liblist rtlLib;
      |            ^~~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:4: Unsupported: Verilog 2001-config reserved word not implemented: 'instance'
   10 |    instance top.a2 liblist gateLib;
      |    ^~~~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:20: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
   10 |    instance top.a2 liblist gateLib;
      |                    ^~~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:11:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
   11 |    include none;
      |    ^~~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:12:4: Unsupported: Verilog 2001-config reserved word not implemented: 'library'
   12 |    library rtlLib *.v;
      |    ^~~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:13:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
   13 |    include aa;
      |    ^~~~~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:14:4: Unsupported: Verilog 2001-config reserved word not implemented: 'use'
   14 |    use gateLib;
      |    ^~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:4: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
   15 |    cell rtlLib.cell;
      |    ^~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:16: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
   15 |    cell rtlLib.cell;
      |                ^~~~
%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:16:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
   16 | endconfig
      | ^~~~~~~~~
%Error: Exiting due to