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21 lines
422 B
Systemverilog
21 lines
422 B
Systemverilog
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// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2020 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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class Base1;
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task meth1; endtask
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endclass
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class Cls2 extends Base1;
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task meth2; endtask
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endclass
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module t (/*AUTOARG*/);
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initial begin
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Cls2 c;
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c.meth3(); // Not found
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end
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endmodule
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