mirror of
https://github.com/verilator/verilator.git
synced 2025-01-10 08:37:35 +00:00
18 lines
328 B
Plaintext
18 lines
328 B
Plaintext
|
// DESCRIPTION: Verilator: Verilog Test data file
|
||
|
|
//
|
||
|
|
// Copyright 2006 by Wilson Snyder. This program is free software; you can
|
||
|
|
// redistribute it and/or modify it under the terms of either the GNU
|
||
|
|
// General Public License or the Perl Artistic License.
|
||
|
|
|
||
|
|
010
|
||
|
|
0_1_1
|
||
|
|
100/*Space*/101// Space
|
||
|
|
110 111
|
||
|
|
|
||
|
|
@00_0_8
|
||
|
|
10000
|
||
|
|
|
||
|
|
@c
|
||
|
|
10100
|
||
|
|
10101
|