Revision history for Verilator

The contributors that suggested a given feature are shown in [].  [by ...]
indicates the contributor was also the author of the fix; Thanks!

* Verilator 3.7**

**   Support SystemVerilog types "byte", "chandle", "int", "longint",
     "shortint", "time", "var" and "void" in variables and functions.

**   Support "program", "package", "import" and $unit.

**   Support typedef.  [Donal Casey]

**   Support direct programming interface (DPI) "import".

***  Support "reg [1:0][1:0][1:0]" and "reg x [3][2]", bug176.  [Byron Bradley]

***  Support declarations in loop initializers, bug172.  [by Byron Bradley]

***  Support $test$plusargs and $value$plusargs, but see the docs!

***  Support $sformat and $swrite.

***  Add VARHIDDEN warning when signal name hides module name.

**** Support optional cell parenthesis, bug179. [by Byron Bradley]

**** Support for loop i++, ++i, i--, --i, bug175. [by Byron Bradley]

**** Add Makefile VM_GLOBAL_FAST, listing objects needed to link executables.

**** Fix creating implicit variables for expressions, bug196. [Byron Bradley]

**** Fix MinGW compilation, bug184. [by Shankar Giri]

**** Fix `define argument mis-replacing system task of same name, bug191.

**** Fix Verilator core dump on wide integer divides, bug178. [Byron Bradley]

* Verilator 3.720 2009/10/26

**   Support little endian bit vectors ("reg [0:2] x;").

**   Support division and modulus of > 64 bit vectors.  [Gary Thomas]

***  Fix writing to out-of-bounds arrays writing element 0.

**** Fix core dump with SystemVerilog var declarations under unnamed begins.

**** Fix VCD files showing internal flattened hierarchy, broke in 3.714.

**** Fix cell port connection to unsized integer causing false width warning.

**** Fix erroring on strings with backslashed newlines, bug168. [Pete Nixon]

* Verilator 3.714 2009/09/18

**   Add --bbox-sys option to blackbox $system calls.

**   Support generate for var++, var--, ++var, --var.

***  Improved warning when "do" used as identifier.

**** Don't require SYSTEMPERL_INCLUDE if SYSTEMPERL/src exists. [Gary Thomas]

**** Fix deep defines causing flex scanner overflows. [Brad Dobbie]

**** Fix preprocessing commas in deep parameterized macros. [Brad Dobbie]

**** Fix tracing escaped dotted identifiers, bug107.

**** Fix $display with uppercase %M.

**** Fix --error-limit option being ignored.

* Verilator 3.713 2009/08/04

**   Support constant function calls for parameters. [many!]

***  Support SystemVerilog "logic", bug101.  [by Alex Duller]

***  Name SYMRSVDWORD error, and allow disabling it, bug103. [Gary Thomas]

**** Fix escaped preprocessor identifiers, bug106. [Nimrod Gileadi]

* Verilator 3.712 2009/07/14

**   Patching SystemC is no longer required to trace sc_bvs.

***  Support zero-width constants in concatenations.  [Jeff Winston]

***  Add verilator --pins-uint8 option to use sc_in<uint8_t/uint16_t>.

***  Add verilator -V option, to show verbose version.

***  On WIDTH warnings, show variable name causing error.  [Jeff Winston]

**** Add BLKLOOPINIT error code, and describe --unroll-count.  [Jeff Winston]

* Verilator 3.711 2009/06/23

**** Support decimal constants of arbitrary widths. [Mark Marshall]

**** Fix error on case statement with all duplicate items, bug99. [Gary Thomas]

**** Fix segfault on unrolling for's with bad inits, bug90. [Andreas Olofsson]

**** Fix tristates causing "Assigned pin is neither...". [by Lane Brooks]

**** Fix compiler errors under Fedora release candidate 11. [Chitlesh Goorah]

* Verilator 3.710 2009/05/19

**   Verilator is now licensed under LGPL v3 and/or Artistic v2.0.

***  `__FILE__ now expands to a string, per draft SystemVerilog 2010(ish).

**** The front end parser has been re-factored to enable more SV parsing.
     Code should parse the same, but minor parsing bugs may pop up.

**** Verilator_includer is no longer installed twice, bug48.  [Lane Brooks]

**** Fix escaped identifiers with '.' causing conflicts, bug83.  [J Baxter]

**** Fix define formal arguments that contain newlines, bug84. [David A]

* Verilator 3.703 2009/05/02

***  Fix $clog2 calculation error with powers-of-2, bug81. [Patricio Kaplan]

**** Fix error with tasks that have output first, bug78.  [Andrea Foletto]

**** Fix "cloning" error with -y/--top-module, bug76. [Dimitris Nalbantis]

**** Fix segfault with error on bad --top-module, bug79. [Dimitris Nalbantis]

**** Fix "redefining I" error with complex includes.  [Duraid Madina]

**** Fix GCC 4.3.2 compile warnings.

* Verilator 3.702 2009/03/28

***  Add --pins-bv option to use sc_bv for all ports.  [Brian Small]

***  Add SYSTEMPERL_INCLUDE envvar to assist RPM builds.  [Chitlesh Goorah]

**** Report errors when duplicate labels are used, bug72.  [Vasu Kandadi]

**** Fix the SC_MODULE name() to not include __PVT__.  [Bob Fredieu]

* Verilator 3.701 2009/02/26

**   Support repeat and forever statements.  [Jeremy Bennett]

***  Add --debugi-<srcfile> option, for internal debugging. [Dennis Muhlestein]

**** Fix compile issues with GCC 4.3, bug47.  [Lane Brooks]

**** Fix VL_RANDom to better randomize bits.  [Art Stamness]

**** Fix error messages to consistently go to stderr. [Jeremy Bennett]

**** Fix left associativity for ?: operators.

* Verilator 3.700 2009/01/08

**   Add limited support for tristate inouts.  Written by Lane Brooks,
     under support by Ubixum Inc.  This allows common pad ring and
     tristate-mux structures to be Verilated.  See the documentation for
     more information on supported constructs.

**   Add --coverage_toggle for toggle coverage analysis.
     Running coverage now requires SystemPerl 1.301 or newer.

***  Add /*verilator coverage_on/_off */ to bracket coverage regions.

***  Optimize two-level shift and and/or trees, +23% on one test.

***  Support posedge of bit-selected signals, bug45. [Rodney Sinclair]

***  Line coverage now aggregates by hierarchy automatically.
     Previously this would be done inside SystemPerl, which was slower.

**** Minor performance improvements of Verilator compiler runtime.

**** Coverage of each parametarized module is counted separately. [Bob Fredieu]

**** Fix creating parameterized modules when no parameter values are changed.

**** Fix certain generate-if cells causing "clone" error. [Stephane Laurent]

**** Fix line coverage of public functions.  [Soon Koh]

**** Fix SystemC 2.2 deprecated warnings about sensitive() and sc_start().

**** Fix arrayed variables under function not compiling, bug44. [Ralf Karge]

**** Fix --output-split-cfuncs to also split trace code. [Niranjan Prabhu]

**** Fix 'bad select range' warning missing some cases, bug43. [Lane Brooks]

**** Fix internal signal names containing control characters (broke in 3.680).

**** Fix compile error on Ubuntu 8.10. [Christopher Boumenot]

**** Fix internal error on "output x; reg x = y;".

**** Fix wrong result for read of delayed FSM signal, bug46. [Rodney Sinclair]

* Verilator 3.681 2008/11/12

***  Add SystemVerilog unique and priority case.

**** Include Verilog file's directory name in coverage reports.

**** Fix 'for' under 'generate-for' causing error; bug38. [Rafael Shirakawa]

**** Fix coverage hierarchy being backwards with inlining.  [Vasu Arasanipalai]

**** Fix GCC 4.3 compile error; bug35.  [Lane Brooks]

**** Fix MSVC compile error; bug42.  [John Stroebel]

* Verilator 3.680 2008/10/08

**   Support negative bit indexes. [Stephane Laurent]
     Tracing negative indexes requires latest Verilog-Perl and SystemPerl.

***  Suppress width warnings between constant strings and wider vectors.
     [Rodney Sinclair]

**** Ignore SystemVerilog timeunit and timeprecision.

**** Expand environment variables in -f input files.  [Lawrence Butcher]

**** Report error if port declaration is missing; bug32. [Guy-Armand Kamendje]

**** Fix genvars causing link error when using --public.  [Chris Candler]

* Verilator 3.671 2008/09/19

**   SystemC uint64_t pins are now the default instead of sc_bv<64>.
     Use --no-pins64 for backward compatibility.

***  Support SystemVerilog "cover property" statements.

***  When warnings are disabled on signals that are flattened out, disable
     the warnings on the signal(s) that replace it.

***  Add by-design and by-module subtotals to verilator_profcfunc.

***  Fix extra evaluation of pure combo blocks in SystemC output.

**** Add IMPERFECTSCH warning, disabled by default.

**** Support coverage under SystemPerl 1.285 and newer.

**** Fix stack overflow on large ? : trees. [John Sanguinetti]

**** Support arbitrary characters in identifiers. [Stephane Laurent]

* Verilator 3.670 2008/07/23

**   Add --x-assign=fast option, and make it the default.
     This chooses performance over reset debugging.  See the manual.

**   Add --autoflush, for flushing streams after $display.  [Steve Tong]

**   Add CASEWITHX lint warning and if disabled fix handling of casez with Xs.

***  Add $feof, $fgetc, $fgets, $fflush, $fscanf, $sscanf. [Holger Waechtler]

***  Add $stime. [Holger Waechtler]

***  Add $random.

***  Add --Wfuture-, for improving forward compatibility.

**** Fix verilator_includer not being installed properly.  [Holger Waechtler]

**** Fix IMPURE errors due to X-assignment temporary variables. [Steve Tong]

**** Fix "lvalue" errors with public functions; bug25.  [CY Wang]

**** Add WIDTH warning to $fopen etc file descriptors.

**** Internal changes to how $displays get compiled and executed.

* Verilator 3.665 2008/06/25

**** Ignore "// verilator" comments alone on endif lines.  [Rodney Sinclair]

**** "Make install" now installs verilator_includer and verilator_profcfunc.

**** Fix tracing missing changes on undriven public wires. [Rodney Sinclair]

**** Fix syntax error when "`include `defname" is ifdefed.  [John Dickol]

**** Fix error when macro call has commas in concatenate. [John Dickol]

**** Fix compile errors under Fedora 9, GCC 4.3.0.  [by Jeremy Bennett]

**** Fix Makefile to find headers/libraries under prefix. [by Holger Waechtler]

* Verilator 3.664 2008/05/08

**** Fix missing file in kit.

* Verilator 3.663 2008/05/07

**** Add DESTDIR to Makefiles to assist RPM construction. [Gunter Dannoritzer]

**** Fix compiler warnings under GCC 4.2.1.

**** Fix preprocessor `else after series of `elsif.  [Mark Nodine]

**** Fix parametrized defines calling define with comma.  [Joshua Wise]

**** Fix comma separated list of primitives.  [by Bryan Brady]

* Verilator 3.662 2008/04/25

***  Add Verilog 2005 $clog2() function.
     This is useful in calculating bus-widths from parameters.

***  Support /**/ comments in -f option files. [Stefan Thiede]

**** Add error message when modules have duplicate names. [Stefan Thiede]

**** Support defines terminated in EOF, though against spec. [Stefan Thiede]

**** Support optional argument to $finish and $stop.  [by Stefan Thiede]

**** Support ranges on gate primitive instantiations. [Stefan Thiede]

**** Ignore old standard(ish) Verilog-XL defines.  [by Stefan Thiede]

**** Fix "always @ ((a) or (b))" syntax error. [by Niranjan Prabhu]

**** Fix "output reg name=expr;" syntax error. [Martin Scharrer]

**** Fix multiple .v files being read in random order. [Stefan Thiede]

**** Fix internal error when params get non-constants. [Johan Wouters]

**** Fix bug introduced in 3.661 with parametrized defines.

* Verilator 3.661 2008/04/04

***  The --enable-defenv configure option added in 3.660 is now the default.
     This hard-codes a default for VERILATOR_ROOT etc in the executables.

***  Add --language option for supporting older code. [Stefan Thiede]

***  Add --top-module option to select between multiple tops. [Stefan Thiede]

***  Unsized concatenates now give WIDTHCONCAT warnings. [Jonathan Kimmitt]
     Previously they threw fatal errors, which in most cases is correct
     according to spec, but can be incorrect in presence of parameter values.

**** Support functions with "input integer".  [Johan Wouters]

**** Ignore delays attached to gate UDPs.  [Stefan Thiede]

**** Fix SystemVerilog parameterized defines with `` expansion,
     and fix extra whitespace inserted on substitution.  [Vladimir Matveyenko]

**** Fix no-module include files on command line.  [Stefan Thiede]

**** Fix dropping of backslash quoted-quote at end of $display.

**** Fix task output pin connected to non-variables. [Jonathan Kimmitt]

**** Fix missing test_v in install datadir. [Holger Waechtler]

**** Fix internal error after MSB < LSB error reported to user. [Stefan Thiede]

* Verilator 3.660 2008/03/23

***  Add support for hard-coding VERILATOR_ROOT etc in the executables,
     to enable easier use of Verilator RPMs.  [Gunter Dannoritzer]

***  Allow multiple .v files on command line.  [Stefan Thiede]

***  Convert re-defining macro error to warning.  [Stefan Thiede]

***  Add --error-limit option.  [Stefan Thiede]

***  Allow __ in cell names by quoting them in C.  [Stefan Thiede]

**** Fix genvar to be signed, so "< 0" works properly.  [Niranjan Prabhu]

**** Fix assignments to inputs inside functions/tasks.  [Patricio Kaplan]

**** Fix definitions in main file.v, referenced in library.  [Stefan Thiede]

**** Fix undefined assigns to be implicit warnings. [Stefan Thiede]

* Verilator 3.658 2008/02/25

**** Fix unistd compile error in 3.657.  [Patricio Kaplan, Jonathan Kimmitt]

* Verilator 3.657 2008/02/20

**** Fix assignments of {a,b,c} = {c,b,a}.  [Jonathan Kimmitt]

**** Fix Perl warning with --lint-only.  [by Ding Xiaoliang]

**** Avoid creating obj_dir with --lint-only.  [Ding Xiaoliang]

**** Fix parsing of always @(*).  [Patricio Kaplan]

* Verilator 3.656 2008/01/18

**** Wide VL_CONST_W_#X functions are now made automatically. [Bernard Deadman]
     In such cases, a new {prefix}__Inlines.h file will be built and included.

**** Fixed sign error when extracting from signed memory.  [Peter Debacker]

**** Fixed tracing of SystemC w/o SystemPerl. [Bernard Deadman, Johan Wouters]

* Verilator 3.655 2007/11/27

***  Support "#delay <statement>;" with associated STMTDLY warning.

**** Fixed generate for loops with constant zero conditions. [Rodney Sinclair]

**** Fixed divide-by-zero errors in constant propagator. [Rodney Sinclair]

**** Fixed wrong result with obscure signed-shift underneath a "? :".

**** Fixed many internal memory leaks, and added leak detector.

* Verilator 3.654 2007/10/18

**** Don't exit early if many warnings but no errors are found. [Stan Mayer]

**** Fixed parsing module #(parameter x,y) declarations. [Oleg Rodionov]

**** Fixed parsing system functions with empty parens. [Oleg Rodionov]

* Verilator 3.653 2007/8/1

**** Support SystemVerilog ==? and !=? operators.

**** Fixed SC_LIBS missing from generated makefiles. [Ding Xiaoliang]

* Verilator 3.652 2007/6/21

**** Report as many warning types as possible before exiting.

**** Support V2K portlists with "input a,b,...".  [Mark Nodine]

**** Support V2K function/task argument lists.

**** Optimize constant $display arguments.

**** Fixed Preprocessor dropping some `line directives.  [Mark Nodine]

* Verilator 3.651 2007/5/22

***  Added verilator_profcfunc utility.  [Gene Weber]

***  Treat modules within `celldefine and `endcelldefine as if in library.

***  Support functions which return integers.  [Mark Nodine]

**** Warn if flex is not installed.  [Ralf Karge]

**** Ignore `protect and `endprotect.

**** Allow empty case/endcase blocks.

* Verilator 3.650 2007/4/20

**   Add --compiler msvc option.  This is now required when Verilated code
     is to be run through MSVC++.  This also enables fixing MSVC++ error
     C1061, blocks nested too deeply.  [Ralf Karge]

**   Add --lint-only option, to lint without creating other output.

***  Add /*verilator lint_save*/ and /*verilator lint_restore*/ to allow
     friendly control over re-enabling lint messages.  [Gerald Williams]

***  Support SystemVerilog .name and .* interconnect.

***  Support while and do-while loops.

***  Use $(LINK) instead of $(CXX) for Makefile link rules.  [Gerald Williams]

***  Add USER_CPPFLAGS and USER_LDFLAGS to Makefiles.  [Gerald Williams]

**** Fixed compile errors under Windows MINGW compiler.  [Gerald Williams]

**** Fixed dotted bit reference to local memory.  [Eugene Weber]

**** Fixed 3.640 `verilog forcing IEEE 1364-1995 only.  [David Hewson]

* Verilator 3.640 2007/3/12

***  Support Verilog 2005 `begin_keywords and `end_keywords.

***  Updated list of SystemVerilog keywords to correspond to IEEE 1800-2005.

***  Add /*verilator public_flat*/.  [Eugene Weber]

**** Try all +libext's in the exact order given.  [Michael Shinkarovsky]

**** Fixed elimination of public signals assigned to constants.  [Eugene Weber]

**** Fixed internal error when public for loop has empty body.  [David Addison]

**** Fixed "Loops detected" assertion when model exceeds 4GB.  [David Hewson]

**** Fixed display %m names inside named blocks.

* Verilator 3.633 2007/2/7

***  Add --trace-depth option for minimizing VCD file size. [Emerson Suguimoto]

***  With VL_DEBUG, show wires causing convergence errors. [Mike Shinkarovsky]

**** Fixed isolate_assignments when many signals per always. [Mike Shinkarovsky]

**** Fixed isolate_assignments across task/func temporaries. [Mike Shinkarovsky]

**** Fixed $display's with array select followed by wide AND.  [David Hewson]

* Verilator 3.632 2007/1/17

***  Add /*verilator isolate_assignments*/ attribute.  [Mike Shinkarovsky]

* Verilator 3.631 2007/1/2

**   Support standard NAME[#] for cells created by arraying or generate for.
     This replaces the non-standard name__# syntax used in earlier versions.

**** Fixed again dotted references into generate cells.  [David Hewson]
     Verilator no longer accepts duplicated variables inside unique
     generate blocks as this is illegal according to the specification.

**** Fixed $readmem* with filenames < 8 characters.  [Emerson Suguimoto]

* Verilator 3.630 2006/12/19

**   Support $readmemb and $readmemh.  [Eugene Weber, Arthur Kahlich]

***  Fixed configure and compiling under Solaris.  [Bob Farrell]

***  When dotted signal lookup fails, help the user by showing known scopes.

***  Reduce depth of priority encoded case statements.  [Eugene Weber]

**** Fixed dotted references inside generated cells.  [David Hewson]

**** Fixed missed split optimization points underneath other re-split blocks.

* Verilator 3.623 2006/12/05

***  Add --output-split-cfuncs for accelerating GCC compile. [Eugene Weber]

**** Fixed $signed mis-extending when input has a WIDTH violation. [Eugene Weber]

**** Add M32 make variable to support -m32 compiles.  [Eugene Weber]

* Verilator 3.622 2006/10/17 Stable

**** Fixed --skip-identical without --debug, broken in 3.621.  [Andy Meier]

* Verilator 3.621 2006/10/11 Beta

**   Add /*verilator no_inline_task*/ to prevent over-expansion. [Eugene Weber]

***  Public functions now allow > 64 bit arguments.

**** Remove .vpp intermediate files when not under --debug.

**** Fixed link error when using --exe with --trace.  [Eugene Weber]

**** Fixed mis-optimization of wide concats with constants.

**** Fixed core dump on printing error when not under --debug.  [Allan Cochrane]

* Verilator 3.620 2006/10/04 Stable

***  Support simple inout task ports.  [Eugene Weber]

***  Allow overriding Perl, Flex and Bison versions.  [by Robert Farrell]

***  Optimize variables set to constants within basic blocks for ~3%.

**** Default make no longer makes the docs; if you edit the documentation.
     sources, run "make info" to get them.

**** Optimize additional boolean identities (a|a = a, etc.)

**** Fixed coredump when dotted cross-ref inside task call. [Eugene Weber]

**** Fixed dotted variables in always sensitivity lists. [Allan Cochrane]

* Verilator 3.610 2006/09/20 Stable

***  Verilator now works under DJGPP (Pentium GCC).  [John Stroebel]

**** Add default define for VL_PRINTF.  [John Stroebel]

**** Removed coverage request variable; see Coverage limitations in docs.

**** Fixed DOS carriage returns in multiline defines.  [Ralf Karge]

**** Fixed printf format warnings on 64-bit linux.

* Verilator 3.602 2006/09/11 Stable

**** Fixed function references under top inlined module.  [David Hewson]

* Verilator 3.601 2006/09/06 Beta

***  Added --inhibit-sim flag for environments using old __Vm_inhibitSim.

***  Added `systemc_dtor for destructor extensions.  [Allan Cochrane]

***  Added -MP to make phony dependencies, ala GCC's.

***  Changed how internal functions are invoked to reduce aliasing.
     Useful when using GCC's -O2 or -fstrict-aliasing, to gain another ~4%.

**** Fixed memory leak when destroying modules.  [John Stroebel]

**** Fixed coredump when unused modules have unused cells.  [David Hewson]

**** Fixed 3.600 internal error with arrayed instances.  [David Hewson]

**** Fixed 3.600 internal error with non-unrolled function loops.  [David Hewson]

**** Fixed $display %m name not matching Verilog name inside SystemC modules.

**** Declare optimized lookup tables as 'static', to reduce D-Cache miss rate.

* Verilator 3.600 2006/08/28 Beta

**   Support dotted cross-hierarchy variable and task references.

**** Lint for x's in generate case statements.

**** Fixed line numbers being off by one when first file starts with newline.

**** Fixed naming of generate for blocks to prevent non-inline name conflict.

**** Fixed redundant statements remaining after table optimization.

* Verilator 3.542 2006/08/11 Stable

**** Fixed extraneous UNSIGNED warning when comparing genvars.  [David Hewson]

**** Fixed extra white space in $display %c.  [by David Addison]

**** vl_finish and vl_fatal now print via VL_PRINTF rather then cerr/cout.

**** Add VL_CONST_W_24X macro.  [Bernard Deadman]

* Verilator 3.541 2006/07/05 Beta

***  Fixed "// verilator lint_on" not re-enabling warnings.  [David Hewson]

***  Fixed 3.540's multiple memory assignments to same block.  [David Hewson]

**** Add warning on changeDetect to arrayed structures.  [David Hewson]

**** Fixed non-zero start number for arrayed instantiations.  [Jae Hossell]

**** Fixed GCC 4.0 header file warnings.

* Verilator 3.540 2006/06/27 Beta

**** Optimize combo assignments that are used only once, ~5-25% faster.

**** Optimize delayed assignments to memories inside loops, ~0-5% faster.

**** Fixed mis-width warning on bit selects of memories.  [David Hewson]

**** Fixed mis-width warning on dead generate-if branches.  [Jae Hossell]

* Verilator 3.533 2006/06/05 Stable

***  Add PDF user manual, verilator.pdf.

**** Fixed delayed bit-selected arrayed assignments. [David Hewson]

**** Fixed execution path to Perl.  [Shanshan Xu]

**** Fixed Bison compile errors in verilog.y.  [by Ben Jackson]

* Verilator 3.531 2006/05/10 Stable

***  Support $c routines which return 64 bit values.

**** Fixed `include `DEFINE.

**** Fixed Verilator core dump when have empty public function. [David.Hewson]

* Verilator 3.530 2006/04/24 Stable

**   $time is now 64 bits.  The macro VL_TIME_I is now VL_TIME_Q, but calls
     the same sc_time_stamp() function to get the current time.

* Verilator 3.523 2006/03/06 Stable

**** Fixed error line numbers being off due to multi-line defines.  [Mat Zeno]

**** Fixed GCC sign extending (uint64_t)(a<b). [David Hewson]

**** Fixed `systemc_imp_header "undefined macro" error.

* Verilator 3.522 2006/02/23 Beta

**** Add UNUSED error message, for forward compatibility.

* Verilator 3.521 2006/02/14 Beta

***  Create new --coverage-line and --coverage-user options. [Peter Holmes]

**** Added SystemVerilog 'x,'z,'0,'1, and new string literals.

**** Fixed public module's parent still getting inlined.

* Verilator 3.520 2006/01/14 Stable

**   Added support for $fopen, $fclose, $fwrite, $fdisplay.
     See documentation, as the file descriptors differ from the standard.

* Verilator 3.510 2005/12/17 Stable

**   Improve trace-on performance on large multi-clock designs by 2x or more.
     This adds a small ~2% performance penalty if traces are compiled in,
     but not turned on.  For best non-tracing performance, do not use --trace.

**** Fixed $'s in specify delays causing bad PLI errors.  [Mat Zeno]

**** Fixed public functions not setting up proper symbol table. [Mat Zeno]

**** Fixed genvars generating trace compile errors.  [Mat Zeno]

**** Fixed VL_MULS_WWW compile error with MSVC++. [Wim Michiels]

* Verilator 3.502 2005/11/30 Stable

**** Fixed local non-IO variables in public functions and tasks.

**** Fixed bad lifetime optimization when same signal is assigned multiple
     times in both branch of a if. [Danny Ding]

* Verilator 3.501 2005/11/16 Stable

***  Add --profile-cfuncs for correlating profiles back to Verilog.

**** Fixed functions where regs are declared before inputs.  [Danny Ding]

**** Fixed bad deep expressions with bit-selects and rotate.  [Prabhat Gupta]

* Verilator 3.500 2005/10/30 Stable

**   Support signed numbers, >>>, $signed, $unsigned.  [MANY!]

**   Support multi-dimensional arrays.  [Eugen Fekete]

**   Add very limited support for the Property Specification Language
     (aka PSL or Sugar).  The format and keywords are now very limited, but will
     grow with future releases.  The --assert switch enables this feature.

**   With --assert, generate assertions for synthesis parallel_case and full_case.

**** Fixed generate if's with empty if/else blocks.  [Mat Zeno]

**** Fixed generate for cell instantiations with same name.  [Mat Zeno]

* Verilator 3.481 2005/10/12 Stable

***  Add /*verilator tracing_on/off*/ for waveform control.

**** Fixed split optimization reordering $display statements.

* Verilator 3.480 2005/9/27 Beta

**   Allow coverage of flattened modules, and multiple points per line.
     Coverage analysis requires SystemPerl 1.230 or newer.

**** Add preprocessor changes to support meta-comments.

**** Optimize sequential assignments of different bits of same bus; ~5% faster.

**** Optimize away duplicate lookup tables.

**** Optimize wide concatenates into individual words.  [Ralf Karge]

**** Optimize local variables from delayed array assignments.

* Verilator 3.470 2005/9/6 Stable

***  Optimize staging flops under reset blocks.

***  Add '-Werror-...' to upgrade specific warnings to errors.

**** Add GCC branch prediction hints on generated if statements.

**** Fixed bad simulation when same function called twice in same expression.

**** Fixed preprocessor substitution of quoted parameterized defines.

* Verilator 3.464 2005/8/24 Stable

***  Add `systemc_imp_header, for use when using --output-split.

***  Add --stats option to dump design statistics.

**** Fixed core dump with clock inversion optimizations.

* Verilator 3.463 2005/8/5 Stable

***  Fixed case defaults when not last statement in case list. [Wim Michiels]

* Verilator 3.462 2005/8/3 Stable

***  Fixed reordering of delayed assignments to same memory index. [Wim Michiels]

**** Fixed compile error with Flex 2.5.1.  [Jens Arm]

**** Fixed multiply-instantiated public tasks generating non-compilable code.

* Verilator 3.461 2005/7/28 Beta

**** Fixed compile error with older versions of bison.  [Jeff Dutton]

* Verilator 3.460 2005/7/27 Beta

**   Add -output-split option to enable faster parallel GCC compiles.
     To support --output-split, the makefiles now split VM_CLASSES
     into VM_CLASSES_FAST and VM_CLASSES_SLOW.  This may require a
     change to local makefiles.

**   Support -v argument to read library files.

***  When issuing unoptimizable warning, show an example path.

**** Fixed false warning when a clock is constant.

**** Fixed X/Z in decimal numbers.  [Wim Michiels]

**** Fixed genvar statements in non-named generate blocks.

**** Fixed core dump when missing newline in `define.  [David van der bokke]

**** Internal tree dumps now indicate edit number that changed the node.

* Verilator 3.450 2005/7/12

**   $finish will no longer exit, but set Verilated::gotFinish().
     This enables support for final statements, and for other cleanup code.
     If this is undesired, redefine the vl_user_finish routine.  Top level
     loops should use Verilated::gotFinish() as a exit condition for their
     loop, and then call top->final().  To prevent a infinite loop, a
     double $finish will still exit; this may be removed in future
     releases.

***  Add support for SystemVerilog keywords $bits, $countones, $isunknown,
     $onehot, $onehot0, always_comb, always_ff, always_latch, finish.

**** Fixed "=== 1'bx" to always be false, instead of random.

* Verilator 3.440 2005/6/28 Stable

**   Add Verilog 2001 generate for/if/case statements.

* Verilator 3.431 2005/6/24 Stable

***  Fixed selection bugs introduced in 3.430 beta.

* Verilator 3.430 2005/6/22 Beta

**   Add Verilog 2001 variable part selects [n+:m] and [n-:m].  [Wim Michiels]

* Verilator 3.422 2005/6/10 Stable

***  Added Verilog 2001 power (**) operator.  [Danny Ding]

**** Fixed crash and added error message when assigning to inputs.  [Ralf Karge]

**** Fixed tracing of modules with public functions.

* Verilator 3.421 2005/6/2 Beta

**** Fixed error about reserved word on non-public signals.

**** Fixed missing initialization compile errors in 3.420 beta. [Ralf Karge]

* Verilator 3.420 2005/6/2 Beta

***  Fixed case defaults when not last statement in case list. [Ralf Karge]

**** Added error message when multiple defaults in case statement.

**** Fixed crash when wire self-assigns x=x.

**   Performance improvements worth ~20%

**   Added -x-assign options; ~5% faster if use -x-assign=0.

**** Optimize shifts out of conditionals and if statements.

**** Optimize local 'short' wires.

**** Fixed gate optimization with top-flattened modules. [Mahesh Kumashikar]

* Verilator 3.411 2005/5/30 Stable

**** Fixed compile error in GCC 2.96.  [Jeff Dutton]

* Verilator 3.410 2005/5/25 Beta

**   Allow functions and tasks to be declared public.
     They will become public C++ functions, with appropriate C++ types.
     This allows users to make public accessor functions/tasks, instead
     of having to use public variables and `systemc_header hacks.

***  Skip producing output files if all inputs are identical
     This uses timestamps, similar to make.  Disable with --no-skip-identical.

**** Improved compile performance with large case statements.

**** Fixed internal error in V3Table.  [Jeff Dutton]

**** Fixed compile error in GCC 2.96, and with SystemC 1.2.  [Jeff Dutton]

* Verilator 3.400 2005/4/29 Beta

**   Internal changes to support future clocking features.

**   Verilog-Perl and SystemPerl are no longer required for C++ or SystemC
     output.  If you want tracing or coverage analysis, they are still needed.

***  Added --sc to create pure SystemC output not requiring SystemPerl.

***  Added --pins64 to create 64 bit SystemC outputs instead of sc_bv<64>.

***  The --exe flag is now required to produce executables inside the makefile.
     This was previously the case any time .cpp files were passed on the
     command line.

***  Added -O3 and --inline-mult for performance tuning.  [Ralf Karge]
     One experiment regained 5% performance, at a cost of 300% in compile time.

***  Improved performance of large case/always statements with low fanin
     by converting to internal lookup tables (ROMs).

***  Initialize SystemC port names.  [S Shuba]

**** Added Doxygen comments to Verilated includes.

**** Fixed -cc pins 8 bits wide and less to be uint8_t instead of uint16_t.

**** Fixed crash when Mdir has same name as .v file.  [Gernot Koch]

**** Fixed crash with size mismatches on case items.  [Gernot Koch]

* Verilator 3.340 2005/2/18 Stable

***  Report misconnected pins across all modules, instead of just first error.

**** Fixed over-active inlining, resulting in compile slowness.

**** Improved large netlist compile times.

**** Added additional internal assertions.

* Verilator 3.332 2005/1/27

***  Added -E preprocess only flag, similar to GCC.

***  Added CMPCONSTLR when comparison is constant due to > or < with all ones.

**** Fixed loss of first -f file argument, introduced in 3.331.

* Verilator 3.331 2005/1/18

**   The Verilog::Perl preprocessor is now C++ code inside of Verilator.
     This improves performance, makes compilation easier, and enables
     some future features.

***  Support arrays of instantiations (non-primitives only). [Wim Michiels]

**** Fixed unlinked error with defparam.  [Shawn Wang]

* Verilator 3.320 2004/12/10

**   NEWS is now renamed Changes, to support CPAN indexing.

***  If Verilator is passed a C file, create a makefile link rule.
     This saves several user steps when compiling small projects.

***  Added new COMBDLY warning in place of fatal error.  [Shawn Wang]

***  Fixed mis-simulation with wide-arrays under bit selects.  [Ralf Karge]

**** Added NC Verilog as alternative to VCS for reference tests.

**** Support implicit wire declarations on input-only signals.
     (Dangerous, as leads to wires without drivers, but allowed by spec.)

**** Fixed compile warnings on Suse 9.1

* Verilator 3.311 2004/11/29

**   Support implicit wire declarations (as a warning).  [Shawn Wang]

**** Fixed over-shift difference in Verilog vs C++.  [Ralf Karge]

* Verilator 3.310 2004/11/15

**   Support defparam.

**   Support gate primitives: buf, not, and, nand, or, nor, xor, xnor.

***  Ignore all specify blocks.

* Verilator 3.302 2004/11/12

***  Support NAND and NOR operators.

***  Better warnings when port widths don't match.

**** Fixed internal error due to some port width mismatches. [Ralf Karge]

**** Fixed WIDTH warnings on modules that are only used
     parameterized, not in 'default' state.

**** Fixed selection of SystemC library on cygwin systems. [Shawn Wang]

**** Fixed runtime bit-selection of parameter constants.

* Verilator 3.301 2004/11/04

**** Fixed 64 bit [31:0] = {#{}} mis-simulation.  [Ralf Karge]

**** Fixed shifts greater then word width mis-simulation.  [Ralf Karge]

**** Work around GCC 2.96 negation bug.

* Verilator 3.300 2004/10/21

**   New backend that eliminates most VL_ macros.
     Improves performance 20%-50%, depending on frequency of use of signals
     over 64 bits. GCC compile times with -O2 shrink by a factor of 10.

**** Fixed "setting unsigned int from signed value" warning.

* Verilator 3.271 2004/10/21

**** Fixed "loops detected" error with some negedge clocks.

**** Cleaned up some output code spacing issues.

* Verilator 3.270 2004/10/15

***  Support Verilog 2001 parameters in module headers. [Ralf Karge]

**** Suppress numeric fault when dividing by zero.

**** Faster code to support compilers not inlining all Verilated functions.

* Verilator 3.260 2004/10/7

**   Support Verilog 2001 named parameter instantiation. [Ralf Karge]

**** Return 1's when one bit wide extract indexes outside array bounds.

**** Fixed compile warnings on 64-bit operating systems.

**** Fixed incorrect dependency in .d file when setting VERILATOR_BIN.

* Verilator 3.251 2004/9/9

**** Fixed parenthesis overflow in Microsoft Visual C++ [Renga Sundararajan]

* Verilator 3.250 2004/8/30

**   Support Microsoft Visual C++ [Renga Sundararajan]

***  SystemPerl 1.161+ is required.

* Verilator 3.241 2004/8/17

**   Support ,'s to separate multiple assignments. [Paul Nitza]

**** Fixed shift sign extension problem using non-GCC compilers.

* Verilator 3.240 2004/8/13

**   Verilator now uses 64 bit math where appropriate.
     Inputs and outputs of 33-64 bits wide to the C++ Verilated model must
     now be uint64_t's; SystemC has not changed, they will remain sc_bv's.
     This increases performance by ~ 9% on x86 machines, varying with how
     frequently 33-64 bit signals occur.  Signals 9-16 bits wide are now
     stored as 16 bit shorts instead of longs, this aids cache packing.

**** Fixed SystemC compile error with feedthrus. [Paul Nitza]

**** Fixed concat value error introduced in 3.230.

* Verilator 3.230 2004/8/10

***  Added coverage output to test_sp example, SystemPerl 1.160+ is required.

**** Fixed time 0 value of signals. [Hans Van Antwerpen]
     Earlier versions would not evaluate some combinatorial signals
     until posedge/negedge blocks had been activated.

**** Fixed wide constant inputs to public submodules [Hans Van Antwerpen]

**** Fixed wide signal width extension bug.
     Only applies when width mismatch warnings were overridden.

* Verilator 3.220 2004/6/22

**   Many waveform tracing changes:

***  Tracing is now supported on C++ standalone simulations. [John Brownlee]

***  When tracing, SystemPerl 1.150 or newer is required.

***  When tracing, Verilator must be called with the --trace switch.

**** Added SystemPerl example to documentation.  [John Brownlee]

**** Various Cygwin compilation fixes.  [John Brownlee]

* Verilator 3.210 2004/4/1

**   Compiler optimization switches have changed
     See the BENCHMARKING section of the documentation.

***  With Verilog-Perl 2.3 or newer, Verilator supports SystemVerilog
     preprocessor extensions.

***  Added localparam. [Thomas Hawkins]

***  Added warnings for SystemVerilog reserved words.

* Verilator 3.203 2004/3/10

***  Notes and repairs for Solaris. [Fred Ma]

* Verilator 3.202 2004/1/27

**   The beta version is now the primary release.  See below for many changes.
     If you have many problems, you may wish to try release 3.125.

***  Verilated::traceEverOn(true) must be called at time 0 if you will ever
     turn on tracing (waveform dumping) of signals.  Future versions will
     need this switch to disable trace incompatible optimizations.

**** Fixed several tracing bugs

**** Added optimizations for common replication operations.

* Verilator 3.201-beta 2003/12/10

**   BETA VERSION, USE 3.124 for stable release!

**   Version 3.2XX includes a all new back-end.
     This includes automatic inlining, flattening of signals between
     hierarchy, and complete ordering of statements.  This results in
     60-300% execution speedups, though less pretty C++ output.  Even
     better results are possible using GCC 3.2.2 (part of Redhat 9.1), as
     GCC has fixed some optimization problems which Verilator exposes.

     If you are using `systemc_ctor, beware pointers to submodules are now
     initialized after the constructor is called for a module, to avoid
     segfaults, move statements that reference subcells into initial
     statements.

***  C++ Constructor that creates a verilog module may take a char* name.
     This name will be used to prefix any $display %m arguments, so users may
     distinguish between multiple Verilated modules in a single executable.

* Verilator 3.125 2004/1/27

**** Optimization of bit replications

* Verilator 3.124 2003/12/05

***  A optimized executable will be made by default, in addition to a debug
     executable.  Invoking Verilator with --debug will pick the debug version.

**** Many minor invisible changes to support the next version.

* Verilator 3.123 2003/11/10

**** Wide bus performance enhancements.

**** Fixed function call bug when width warning suppressed. [Leon Wildman]

**** Fixed __DOT__ compile problem with funcs in last revision. [Leon Wildman]

* Verilator 3.122 2003/10/29

***  Modules which are accessed from external code now must be marked with
     /*verilator public_module*/ unless they already contain public signals.
     To enforce this, private cell names now have a string prepended.

**** Fixed replicated function calls in one statement. [Robert A. Clark]

**** Fixed function call bug when width warning suppressed. [Leon Wildman]

* Verilator 3.121 2003/09/29

***  Support multiplication over 32 bits. [Chris Boumenot]
     Also improved speed of addition and subtraction over 32 bits.

***  Detect bit selection out of range errors.

***  Detect integer width errors.

**** Fixed width problems on function arguments. [Robert A. Clark]

* Verilator 3.120 2003/09/24

***  $finish now exits the model (via vl_finish function).

***  Support inputs/outputs in tasks.

***  Support V2K "integer int = {INITIAL_VALUE};"

***  Ignore floating point delay values.  [Robert A. Clark]

**** Ignore `celldefine, `endcelldefine, etc. [Robert A. Clark]

**** New optimizations on reduction operators.

**** Fixed converting "\ooo" into octal values.

**** Fixed $display("%x");

* Verilator 3.112 2003/09/16

**** Fixed functions in continuous assignments. [Robert A. Clark]

**** Fixed inlining of modules with 2-level deep outputs.

* Verilator 3.111 2003/09/15

**** Fixed declaration of functions before using that module. [Robert A. Clark]

**** Fixed module inlining bug with outputs.

* Verilator 3.110 2003/09/12

**   Support Verilog 2001 style input/output declarations. [Robert A. Clark]

***  Allow local vars in headers of function/tasks. [Leon Wildman]

* Verilator 3.109 2003/08/28

**   Added support for local variables in named begin blocks. [Leon Wildman]

* Verilator 3.108 2003/08/11

**   Added support for functions.

***  Signals 8 bits and shorter are now stored as chars
     instead of uint32_t's.  This improves Dcache packing and
     improves performance by ~7%.

**** $display now usually results in a single VL_PRINT rather then many.

**** Many optimizations involving conditionals (?:)

* Verilator 3.107 2003/07/15

***  --private and --l2name are now the default,
     as this enables additional optimizations.
     Use --noprivate or --nol2name to get the older behavior.

***  Now support $display of binary and wide format data.

***  Added detection of incomplete case statements,
     and added related optimizations worth ~4%.

**** Work around flex bug in Redhat 8.0.  [Eugene Weber]

**** Added some additional C++ reserved words.

**** Additional constant optimizations, ~5% speed improvement.

* Verilator 3.106 2003/06/17

** $c can now take multiple expressions as arguments.
   For example $c("foo","bar(",32+1,");") will insert "foobar(33);"
   This makes it easier to pass the values of signals.

** Several changes to support future versions that may have
   signal-eliminating optimizations.  Users should try to use these switch
   on designs, they will become the default in later versions.

*** Added --private switch and /*verilator public*/ metacomment.
    This renames all signals so that compile errors will result if any
    signals referenced by C++ code are missing a /*verilator public*/
    metacomment.

*** With --l2name, the second level cell C++ cell is now named "v".
    Previously it was named based on the name of the verilog code.  This
    means to get to signals, scope to "{topcell} ->v ->{mysignal}" instead
    of "{topcell} ->{verilogmod}. {mysignal}".  This allows different
    modules to be substituted for the cell without requiring source
    changes.

**** Several cleanups for Redhat 8.0.

* Verilator 3.105 2003/05/08

**** Fixed more GCC 3.2 errors. [David Black]

* Verilator 3.104 2003/04/30

*** Indicate direction of ports with VL_IN and VL_OUT.

*** Allow $c32, etc, to specify width of the $c statement for VCS.

**** Fixed false "indent underflow" error inside `systemc_ctor sections.

**** Fixed missing ordering optimizations when outputs also used internally.

*** Numerous performance improvements, worth about 25%

**** Assign constant cell pins in initial blocks rather then every cycle.

**** Promote subcell's combo logic to sequential evaluation when possible.

**** Fixed GCC 3.2 compile errors.  [Narayan Bhagavatula]

* Verilator 3.103 2003/01/28

**** Fixed missing model evaluation when clock generated several levels of
     hierarchy across from where it is used as a clock.  [Richard Myers]

**** Fixed sign-extension bug introduced in 3.102.

* Verilator 3.102 2003/01/24

**** Fixed sign-extension of X/Z's ("32'hx")

* Verilator 3.101 2003/01/13

**** Fixed 'parameter FOO=#'bXXXX' [Richard Myers]

**** Allow spaces inside numbers ("32'h 1234") [Sam Gladstone]

* Verilator 3.100 2002/12/23

**   Support for simple tasks w/o vars or I/O.  [Richard Myers]

**** Ignore DOS carriage returns in Linux files. [Richard Myers]

* Verilator 3.012 2002/12/18

**** Fixed parsing bug with casex statements containing case items
     with bit extracts of parameters. [Richard Myers]

**** Fixed bug which could cause writes of non-power-of-2 sized arrays to
     corrupt memory beyond the size of the array. [Dan Lussier]

**** Fixed bug which did not detect UNOPT problems caused by
     submodules.  See the description in the verilator man page. [John Deroo]

**** Fixed compile with threaded Perl.  [Ami Keren]

* Verilator 3.010  2002/11/3

*** Support SystemC 2.0.1.  SystemPerl version 1.130 or newer is required.

**** Fixed bug with inlined modules under other inlined modules.  [Scott
     Bleiweiss]

* Verilator 3.005  2002/10/21

**** Fixed X's in case (not casex/z) to constant propagate correctly.

**** Fixed missing include. [Kurachi]

* Verilator 3.004  2002/10/10

*** Added /* verilator module_inline */ and associated optimizations.

*** Allow /* verilator coverage_block_off */ in place of `coverage_block_off.
    This prevents problems with Emacs AUTORESET. [Ray Strouble]

**** Fixed `coverage_block_off also disabling subsequent blocks.

**** Fixed unrolling of loops with multiple simple statements.

**** Fixed compile warnings on newer GCC. [Kurachi]

**** Additional concatenation optimizations.

* Verilator 3.003  2002/09/13

*** Now compiles on Windows 2000 with Cygwin.

**** Fixed bug with pin assignments to wide memories.

**** Optimize wire assignments to constants.

* Verilator 3.002  2002/08/19

** First public release of version 3.

* Verilator 3.000  2002/08/03

** All new code base.  Many changes too numerous to mention.

*** Approximately 4 times faster then Verilator 2.
*** Supports initial statements
*** Supports correct blocking/nonblocking assignments
*** Supports `defines across multiple modules
*** Optimizes call ordering, constant propagation, and dead code elimination.

* Verilator 2.1.8 2002/04/03

** All applications must now link against include/verilated.cpp

*** Paths specified to verilator_make should be absolute, or be formed
   to allow for execution in the object directory (prepend ../ to each path.)
   This allows relative filenames for makes which hash and cache dependencies.

**** Added warning when parameter constants are too large. [John Deroo]

**** Added warning when x/?'s used in non-casez statements.

**** Added warning when blocking assignments used in posedge blocks. [Dan Lussier]

**** Split evaluation function into clocked and non-clocked, 20% perf gain.

* Verilator 2.1.5 2001/12/1

** Added coverage analysis.  In conjunction with SystemC provide line
   coverage reports, without SystemC, provide a hook to user written
   accumulation function.  See --coverage option of verilator_make.

*** Relaxed multiply range checking

*** Support for constants up to 128 bits

*** Randomize values used when assigning to X's.

**** Added -guard option of internal testing.

**** Changed indentation in emitted code to be automatically generated.

**** Fixed corruption of assignments of signal over 32 bits with non-0 lsb.

* Verilator 2.1.4 2001/11/16

** Added $c("c_commands();");  for embedding arbitrary C code in Verilog.

* Verilator 2.1.3 2001/11/03

** Support for parameters.

* Verilator 2.1.2 2001/10/25

** Verilog Errors now reference the .v file rather then the .vpp file.

*** Support strings in assignments:  reg [31:0] foo = "STRG";

*** Support %m in format strings.  Ripped out old $info support, use
    Verilog-Perl's vpm program instead.

*** Convert $stop to call of v_stop() which user can define.

**** Fixed bug where a==b==c would have wrong precedence rule.

**** Fixed bug where XNOR on odd-bit-widths (~^ or ^~) had bad value.

* Verilator 2.1.1 2001/5/17

** New test_sp directory for System-Perl (SystemC) top level instantiation
of the Verilated code, lower modules are still C++ code.  (Experimental).

** New test_spp directory for Pure System-Perl (SystemC) where every module
is true SystemC code.  (Experimental)

*** Input ports are now loaded by pointer reference into the sub-cell.
This is faster on I-386 machines, as the stack must be used when there are
a large number of parameters.  Also, this simplifies debugging as the value
of input ports exists for tracing.

**** Many code cleanups towards standard C++ style conventions.

* Verilator 2.1.0 2001/5/8

**** Many code cleanups towards standard C++ style conventions.

* {Version history lost}

* Verilator 1.8 1996/7/8

** [Versions 0 to 1.8 were by Paul Wasson]

****  Fixed single bit in concat from instance output incorrect offset bug.

* Verilator 1.7 1996/5/20

****  Mask unused bits of DONTCAREs.

* Verilator 1.6 1996/5/13

*** Added fasttrace script

* Verilator 1.5 1996/1/9

*** Pass structure pointer into translated code,
    so multiple instances can use same functions.

**** Fixed static value concat on casex items.

* Verilator 1.1 1995/3/30

*** Bug fixes, added verimake_partial script, performance improvements.

* Verilator 1.0c 1994/9/30

*** Initial release of Verilator

* Verilator 0.0 1994/7/8

**** First code written.

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