verilator/test_regress/t/t_trace_two_dumpfst_cc.out
Geza Lore 6a54922044
Set FST timescale correctly. (#2266)
The FST trace timescale used to be set in the constructor via
set_time_unit, but at that point we haven't normally opened the
file yet so it was just dropped. On top of that, we actually want
to use set_time_resolution... FST trace timescales now match the VCD.
2020-04-19 08:47:22 -04:00

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$date
Sun Apr 19 04:15:48 2020
$end
$version
fstWriter
$end
$timescale
1ps
$end
$scope module topa $end
$var wire 1 ! clk $end
$scope module t $end
$var wire 1 ! clk $end
$var integer 32 " cyc $end
$var integer 32 # c_trace_on $end
$scope module sub $end
$var integer 32 $ inside_sub_a $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
$dumpvars
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b00000000000000000000000000000001 $
b00000000000000000000000000000000 #
b00000000000000000000000000000001 "
1!
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b00000000000000000000000000000011 #
b00000000000000000000000000000010 "
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b00000000000000000000000000000011 "
b00000000000000000000000000000100 #
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b00000000000000000000000000000101 #
b00000000000000000000000000000100 "
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b00000000000000000000000000000101 "
b00000000000000000000000000000110 #
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b00000000000000000000000000000111 #
b00000000000000000000000000000110 "
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b00000000000000000000000000000111 "
b00000000000000000000000000001000 #
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b00000000000000000000000000001001 #
b00000000000000000000000000001000 "
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b00000000000000000000000000001001 "
b00000000000000000000000000001010 #
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b00000000000000000000000000001011 #
b00000000000000000000000000001010 "
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0!
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1!
b00000000000000000000000000001100 #
b00000000000000000000000000001011 "